Searched refs:PLL_CPLL (Results 1 – 25 of 27) sorted by relevance
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| /u-boot/arch/arm/dts/ |
| A D | rk3326-odroid-go2-u-boot.dtsi | 41 <&cru PCLK_BUS_PRE>, <&cru PLL_CPLL>;
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| A D | rk3566-anbernic-rgxx3-u-boot.dtsi | 22 <&pmucru PCLK_PMU>, <&cru PLL_CPLL>,
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| A D | rk3326-odroid-go2.dts | 236 <&cru PLL_CPLL>;
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| A D | rk3066a.dtsi | 210 assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
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| A D | rk3399-gru.dtsi | 353 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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| A D | rk322x.dtsi | 492 <&cru PLL_CPLL>, <&cru ACLK_PERI>,
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| A D | rk3328.dtsi | 787 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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| /u-boot/include/dt-bindings/clock/ |
| A D | rk3188-cru-common.h | 13 #define PLL_CPLL 3 macro
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| A D | rk3128-cru.h | 13 #define PLL_CPLL 3 macro
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| A D | rk3228-cru.h | 13 #define PLL_CPLL 3 macro
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| A D | px30-cru.h | 13 #define PLL_CPLL 3 macro
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| A D | rk3288-cru.h | 13 #define PLL_CPLL 3 macro
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| A D | rk3328-cru.h | 13 #define PLL_CPLL 3 macro
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| A D | rk3368-cru.h | 13 #define PLL_CPLL 4 macro
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| A D | rockchip,rv1126-cru.h | 67 #define PLL_CPLL 3 macro
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| A D | rk3399-cru.h | 13 #define PLL_CPLL 4 macro
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| A D | rockchip,rk3588-cru.h | 20 #define PLL_CPLL 5 macro
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| A D | rk3568-cru.h | 72 #define PLL_CPLL 3 macro
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3588.c | 60 [CPLL] = PLL(pll_rk3588, PLL_CPLL, RK3588_PLL_CON(104),
1490 case PLL_CPLL: in rk3588_clk_get_rate()
1641 case PLL_CPLL: in rk3588_clk_set_rate()
1807 else if (parent->id == PLL_CPLL) in rk3588_dclk_vop_set_parent()
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| A D | clk_rk3568.c | 82 [CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3568_PLL_CON(24),
2341 case PLL_CPLL: in rk3568_clk_get_rate()
2517 case PLL_CPLL: in rk3568_clk_set_rate()
2812 if (parent->id == PLL_CPLL) { in rk3568_rkvdec_set_parent()
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| A D | clk_rv1126.c | 66 [CPLL] = PLL(pll_rk3328, PLL_CPLL, RV1126_PLL_CON(16),
1427 case PLL_CPLL: in rv1126_clk_get_rate()
1537 case PLL_CPLL: in rv1126_clk_set_rate()
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| A D | clk_rk3368.c | 464 case PLL_CPLL: in rk3368_clk_get_rate()
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| A D | clk_rk3066.c | 576 case PLL_CPLL: in rk3066_clk_set_rate()
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| A D | clk_px30.c | 1205 case PLL_CPLL: in px30_clk_get_rate()
1294 case PLL_CPLL: in px30_clk_set_rate()
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| A D | clk_rk3288.c | 883 case PLL_CPLL: in rk3288_clk_set_rate()
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