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Searched refs:RST_BUS_I2C2 (Results 1 – 25 of 27) sorted by relevance

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/u-boot/include/dt-bindings/reset/
A Dsuniv-ccu-f1c100s.h33 #define RST_BUS_I2C2 23 macro
A Dsun8i-a23-a33-ccu.h80 #define RST_BUS_I2C2 34 macro
A Dsun8i-a83t-ccu.h91 #define RST_BUS_I2C2 39 macro
A Dsun50i-a64-ccu.h90 #define RST_BUS_I2C2 44 macro
A Dsun9i-a80-ccu.h92 #define RST_BUS_I2C2 42 macro
A Dsun8i-h3-ccu.h96 #define RST_BUS_I2C2 48 macro
A Dsun50i-h616-ccu.h34 #define RST_BUS_I2C2 25 macro
A Dsun50i-h6-ccu.h36 #define RST_BUS_I2C2 27 macro
A Dsun8i-r40-ccu.h114 #define RST_BUS_I2C2 66 macro
/u-boot/drivers/clk/sunxi/
A Dclk_f1c100s.c44 [RST_BUS_I2C2] = RESET(0x2d0, BIT(18)),
A Dclk_a23.c66 [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
A Dclk_a80.c60 [RST_BUS_I2C2] = RESET(0x5b4, BIT(2)),
A Dclk_a64.c97 [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
A Dclk_a83t.c92 [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
A Dclk_h6.c91 [RST_BUS_I2C2] = RESET(0x91c, BIT(18)),
A Dclk_h3.c106 [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
A Dclk_h616.c103 [RST_BUS_I2C2] = RESET(0x91c, BIT(18)),
A Dclk_r40.c121 [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
/u-boot/arch/arm/dts/
A Dsuniv-f1c100s.dtsi248 resets = <&ccu RST_BUS_I2C2>;
A Dsun50i-h616.dtsi429 resets = <&ccu RST_BUS_I2C2>;
A Dsun8i-a23-a33.dtsi578 resets = <&ccu RST_BUS_I2C2>;
A Dsunxi-h3-h5.dtsi786 resets = <&ccu RST_BUS_I2C2>;
A Dsun50i-h6.dtsi578 resets = <&ccu RST_BUS_I2C2>;
A Dsun8i-a83t.dtsi1018 resets = <&ccu RST_BUS_I2C2>;
A Dsun9i-a80.dtsi1137 resets = <&ccu RST_BUS_I2C2>;

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