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Searched refs:RST_BUS_MMC2 (Results 1 – 24 of 24) sorted by relevance

/u-boot/include/dt-bindings/reset/
A Dsun8i-v3s-ccu.h57 #define RST_BUS_MMC2 9 macro
A Dsun8i-a23-a33-ccu.h55 #define RST_BUS_MMC2 9 macro
A Dsun8i-a83t-ccu.h58 #define RST_BUS_MMC2 10 macro
A Dsun50i-a64-ccu.h56 #define RST_BUS_MMC2 10 macro
A Dsun8i-h3-ccu.h57 #define RST_BUS_MMC2 9 macro
A Dsun50i-h616-ccu.h25 #define RST_BUS_MMC2 16 macro
A Dsun50i-h6-ccu.h29 #define RST_BUS_MMC2 20 macro
A Dsun8i-r40-ccu.h58 #define RST_BUS_MMC2 10 macro
/u-boot/drivers/clk/sunxi/
A Dclk_v3s.c47 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
A Dclk_a23.c56 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
A Dclk_a64.c78 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
A Dclk_a83t.c74 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
A Dclk_h6.c83 [RST_BUS_MMC2] = RESET(0x84c, BIT(18)),
A Dclk_h3.c81 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
A Dclk_h616.c92 [RST_BUS_MMC2] = RESET(0x84c, BIT(18)),
A Dclk_r40.c94 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
/u-boot/arch/arm/dts/
A Dsun8i-v3s.dtsi274 resets = <&ccu RST_BUS_MMC2>;
A Dsun50i-h616.dtsi313 resets = <&ccu RST_BUS_MMC2>;
A Dsun8i-a23-a33.dtsi270 resets = <&ccu RST_BUS_MMC2>;
A Dsunxi-h3-h5.dtsi224 resets = <&ccu RST_BUS_MMC2>;
A Dsun50i-h6.dtsi489 resets = <&ccu RST_BUS_MMC2>;
A Dsun8i-a83t.dtsi585 resets = <&ccu RST_BUS_MMC2>;
A Dsun50i-a64.dtsi536 resets = <&ccu RST_BUS_MMC2>;
A Dsun8i-r40.dtsi379 resets = <&ccu RST_BUS_MMC2>;

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