SCG_PLL_CFG_PLLSEL_SHIFT (reference) in projects: u-boot

Searched refs:SCG_PLL_CFG_PLLSEL_SHIFT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx7ulp/
A D	scg.h	`181 #define SCG_PLL_CFG_PLLSEL_SHIFT (1) macro 183 #define SCG_PLL_CFG_PLLSEL_MASK ((0x1UL) << SCG_PLL_CFG_PLLSEL_SHIFT)`
/u-boot/arch/arm/mach-imx/mx7ulp/
A D	scg.c	`273 val = (reg & SCG_PLL_CFG_PLLSEL_MASK) >> SCG_PLL_CFG_PLLSEL_SHIFT; in scg_apll_get_rate() 301 val = (reg & SCG_PLL_CFG_PLLSEL_MASK) >> SCG_PLL_CFG_PLLSEL_SHIFT; in scg_spll_get_rate() 849 #define SCG1_SPLL_CFG_PLLSEL_NUM ((0x1) << SCG_PLL_CFG_PLLSEL_SHIFT) 950 #define SCG1_APLL_CFG_PLLSEL_NUM ((0x0) << SCG_PLL_CFG_PLLSEL_SHIFT)`

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