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Searched refs:STM32_PWR_BASE (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-stm32mp/
A Dstm32mp15x.c45 #define PWR_CR1 (STM32_PWR_BASE + 0x00)
46 #define PWR_MCUCR (STM32_PWR_BASE + 0x14)
A Dpsci.c529 setbits_le32(STM32_PWR_BASE + PWR_CR3, PWR_CR3_DDRRETEN); in ddr_sw_self_refresh_in()
650 clrbits_le32(STM32_PWR_BASE + PWR_CR3, PWR_CR3_DDRRETEN); in ddr_sw_self_refresh_exit()
714 setbits_le32(STM32_PWR_BASE + PWR_MPUCR, in psci_system_suspend()
725 setbits_le32(STM32_PWR_BASE + PWR_CR3, PWR_CR3_DDRSREN); in psci_system_suspend()
/u-boot/arch/arm/mach-stm32mp/include/mach/
A Dstm32.h18 #define STM32_PWR_BASE 0x50001000 macro

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