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Searched refs:UART0_SEL (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/mach-exynos/
A Dexynos5_setup.h639 #define UART0_SEL 6 macro
645 | (UART0_SEL))
808 #define UART0_SEL 3 macro
816 | (UART0_SEL << 4))
A Dexynos4_setup.h223 #define UART0_SEL UART_SEL_SCLKMPLL macro
232 | (UART0_SEL << 0))
/u-boot/board/samsung/odroid/
A Dodroid.c281 clr = UART0_SEL(15) | UART1_SEL(15) | UART2_SEL(15) | in board_clock_init()
291 set = UART0_SEL(6) | UART1_SEL(6) | UART2_SEL(6) | UART3_SEL(6) | in board_clock_init()
A Dsetup.h159 #define UART0_SEL(x) ((x) & 0xf) macro
/u-boot/board/samsung/trats/
A Dsetup.h188 #define UART0_SEL UART_SEL_SCLKMPLL macro
199 | (UART0_SEL << 0))

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