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Searched refs:VPLL_CON1_VAL (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/mach-exynos/
A Dclock_init_exynos4.c90 writel(VPLL_CON1_VAL, &clk->vpll_con1); in system_clock_init()
A Dexynos5_setup.h462 #define VPLL_CON1_VAL 0x00000000 macro
729 #define VPLL_CON1_VAL 0x0020f300 macro
A Dexynos4_setup.h376 #define VPLL_CON1_VAL ((VPLL_SSCG_EN << 31)\ macro
A Dclock_init_exynos5.c663 writel(VPLL_CON1_VAL, &clk->vpll_con1); in exynos5250_system_clock_init()
883 writel(VPLL_CON1_VAL, &clk->vpll_con1); in exynos5420_system_clock_init()
/u-boot/board/samsung/trats/
A Dtrats.c347 writel(VPLL_CON1_VAL, (unsigned int)&clk->vpll_con1); in board_clock_init()
A Dsetup.h278 #define VPLL_CON1_VAL ((VPLL_SSCG_EN << 31)\ macro

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