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Searched refs:_nr (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/include/asm/arch-sunxi/
A Dgpio.h118 #define SUNXI_GPA(_nr) (SUNXI_GPIO_A_START + (_nr)) argument
119 #define SUNXI_GPB(_nr) (SUNXI_GPIO_B_START + (_nr)) argument
120 #define SUNXI_GPC(_nr) (SUNXI_GPIO_C_START + (_nr)) argument
121 #define SUNXI_GPD(_nr) (SUNXI_GPIO_D_START + (_nr)) argument
122 #define SUNXI_GPE(_nr) (SUNXI_GPIO_E_START + (_nr)) argument
123 #define SUNXI_GPF(_nr) (SUNXI_GPIO_F_START + (_nr)) argument
124 #define SUNXI_GPG(_nr) (SUNXI_GPIO_G_START + (_nr)) argument
125 #define SUNXI_GPH(_nr) (SUNXI_GPIO_H_START + (_nr)) argument
126 #define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr)) argument
127 #define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr)) argument
[all …]
/u-boot/drivers/pinctrl/mvebu/
A Dpinctrl-armada-37xx.c102 #define PIN_GRP_GPIO_0(_name, _start, _nr) \ argument
106 .npins = _nr, \
112 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ argument
116 .npins = _nr, \
122 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \ argument
126 .npins = _nr, \
132 #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ argument
136 .npins = _nr, \
142 #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ argument
147 .npins = _nr, \
/u-boot/drivers/clk/rockchip/
A Dclk_rk3188.c78 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
79 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
80 _Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
81 (_nr * _no) == hz, #hz "Hz cannot be hit with PLL "\
A Dclk_rk3368.c48 #define PLL_DIVISORS(hz, _nr, _no) { \ argument
49 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no}; \
50 _Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
51 (_nr * _no) == hz, #hz "Hz cannot be hit with PLL " \
A Dclk_rk3066.c75 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
76 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
77 _Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
78 (_nr * _no) == hz, #hz "Hz cannot be hit with PLL "\
A Dclk_rk3288.c140 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
141 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
142 _Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
143 (_nr * _no) == hz, #hz "Hz cannot be hit with PLL "\

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