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Searched refs:bar (Results 1 – 25 of 68) sorted by relevance

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/u-boot/drivers/power/acpi_pmc/
A Dpmc_emul.c24 u32 bar[6]; member
83 u32 *bar; in sandbox_pmc_emul_read_config() local
86 bar = &plat->bar[barnum]; in sandbox_pmc_emul_read_config()
88 *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type, in sandbox_pmc_emul_read_config()
112 u32 *bar; in sandbox_pmc_emul_write_config() local
115 bar = &plat->bar[barnum]; in sandbox_pmc_emul_write_config()
118 *bar = value; in sandbox_pmc_emul_write_config()
120 *bar |= barinfo[barnum].type; in sandbox_pmc_emul_write_config()
136 u32 base = plat->bar[barnum] & ~PCI_BASE_ADDRESS_SPACE; in sandbox_pmc_emul_find_bar()
/u-boot/drivers/misc/
A Dp2sb_emul.c27 u32 bar[6]; member
88 u32 *bar; in sandbox_p2sb_emul_read_config() local
91 bar = &plat->bar[barnum]; in sandbox_p2sb_emul_read_config()
93 *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type, in sandbox_p2sb_emul_read_config()
117 u32 *bar; in sandbox_p2sb_emul_write_config() local
120 bar = &plat->bar[barnum]; in sandbox_p2sb_emul_write_config()
123 *bar = value; in sandbox_p2sb_emul_write_config()
125 *bar |= barinfo[barnum].type; in sandbox_p2sb_emul_write_config()
141 u32 base = plat->bar[barnum] & ~PCI_BASE_ADDRESS_SPACE; in sandbox_p2sb_emul_find_bar()
A Dswap_case.c25 u32 bar[6]; member
144 u32 *bar; in sandbox_swap_case_read_config() local
147 bar = &plat->bar[barnum]; in sandbox_swap_case_read_config()
149 *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type, in sandbox_swap_case_read_config()
215 u32 *bar; in sandbox_swap_case_write_config() local
218 bar = &plat->bar[barnum]; in sandbox_swap_case_write_config()
221 *bar = value; in sandbox_swap_case_write_config()
223 *bar |= barinfo[barnum].type; in sandbox_swap_case_write_config()
239 u32 base = plat->bar[barnum] & ~PCI_BASE_ADDRESS_SPACE; in sandbox_swap_case_find_bar()
/u-boot/doc/usage/fit/
A Doverlay-fdt-boot.rst49 data = /incbin/("./foo-reva-bar.dtb");
54 data = /incbin/("./foo-revb-bar.dtb");
80 foo-reva-bar.dtb {
84 foo-revb-bar.dtb {
92 foo-revb-bar-baz.dtb {
109 foo-reva.dtb, foo-revb.dtb, foo-reva-bar.dtb, foo-revb-bar.dtb,
174 foo-reva-bar.dtb {
178 foo-revb-bar.dtb {
186 foo-revb-bar-baz.dtb {
190 bar {
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/u-boot/drivers/pci/
A Dpcie_layerscape_gen4.c311 int bar, u64 phys) in ls_pcie_g4_ep_inbound_win_set() argument
316 if (bar == 1) { in ls_pcie_g4_ep_inbound_win_set()
330 int bar; in ls_pcie_g4_ep_setup_wins() local
337 for (bar = 0; bar < PF_BAR_NUM; bar++) { in ls_pcie_g4_ep_setup_wins()
358 u32 bar_pos = BAR_POS(bar, pf, vf_bar); in ls_pcie_g4_ep_enable_bar()
381 int bar, bool vf_bar, u64 size) in ls_pcie_g4_ep_setup_bar() argument
391 int bar; in ls_pcie_g4_ep_setup_bars() local
394 for (bar = 0; bar < PF_BAR_NUM; bar++) in ls_pcie_g4_ep_setup_bars()
395 ls_pcie_g4_ep_setup_bar(pcie, pf, bar, false, bar_size[bar]); in ls_pcie_g4_ep_setup_bars()
401 for (bar = 0; bar < VF_BAR_NUM; bar++) in ls_pcie_g4_ep_setup_bars()
[all …]
A Dpci_common.c104 void *pci_map_bar(pci_dev_t pdev, int bar, int flags) in pci_map_bar() argument
110 pci_read_config_dword(pdev, bar, &bar_response); in pci_map_bar()
125 int bar; in pci_write_bar32() local
127 bar = PCI_BASE_ADDRESS_0 + barnum * 4; in pci_write_bar32()
128 pci_hose_write_config_dword(hose, dev, bar, addr_and_ctrl); in pci_write_bar32()
134 int bar; in pci_read_bar32() local
136 bar = PCI_BASE_ADDRESS_0 + barnum * 4; in pci_read_bar32()
137 pci_hose_read_config_dword(hose, dev, bar, &addr); in pci_read_bar32()
A Dpci_auto.c32 int bar, bar_nr = 0; in dm_pciauto_setup_device() local
65 for (bar = PCI_BASE_ADDRESS_0; in dm_pciauto_setup_device()
66 bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) { in dm_pciauto_setup_device()
70 dm_pci_write_config32(dev, bar, 0xffffffff); in dm_pciauto_setup_device()
71 dm_pci_read_config32(dev, bar, &bar_response); in dm_pciauto_setup_device()
95 dm_pci_read_config32(dev, bar + 4, in dm_pciauto_setup_device()
124 printf("PCI: Failed autoconfig bar %x\n", bar); in dm_pciauto_setup_device()
128 dm_pci_write_config32(dev, bar, (u32)bar_value); in dm_pciauto_setup_device()
131 bar += 4; in dm_pciauto_setup_device()
133 dm_pci_write_config32(dev, bar, in dm_pciauto_setup_device()
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A Dpcie_layerscape_gen4.h49 #define BAR_POS(bar, pf, vf_bar) \ argument
50 ((bar) + (pf) * PF_BAR_NUM + (vf_bar) * PCIE_PF_NUM * PF_BAR_NUM)
144 #define PAB_PEX_BAR_AMAP(pf, bar) \ argument
145 (0x1ba0 + 0x20 * (pf) + 4 * (bar))
147 #define PAB_EXT_PEX_BAR_AMAP(pf, bar) \ argument
148 (0x84a0 + 0x20 * (pf) + 4 * (bar))
A Dpci_auto_common.c37 pci_addr_t *bar, bool supports_64bit) in pciauto_region_allocate() argument
65 *bar = addr; in pciauto_region_allocate()
69 *bar = (pci_addr_t)-1; in pciauto_region_allocate()
A Dpcie_layerscape_ep.c36 enum pci_barno bar = ep_bar->barno; in ls_ep_set_bar() local
37 u32 reg = PCI_BASE_ADDRESS_0 + (4 * bar); in ls_ep_set_bar()
42 idx = bar; in ls_ep_set_bar()
51 ls_pcie_atu_inbound_set(pcie, fn, 0, type, idx, bar, bar_phys); in ls_ep_set_bar()
125 static void ls_pcie_ep_setup_bar(void *bar_base, int bar, u32 size) in ls_pcie_ep_setup_bar() argument
135 switch (bar) { in ls_pcie_ep_setup_bar()
A Dpcie_layerscape.h57 #define PCIE_ATU_BAR_NUM(bar) ((bar) << 8) argument
186 int type, int idx, int bar, u64 phys);
/u-boot/test/dm/
A Dpci.c254 void *bar; in dm_test_pci_ea() local
272 ut_assertnonnull(bar); in dm_test_pci_ea()
273 *(int *)bar = 2; /* swap upper/lower */ in dm_test_pci_ea()
276 ut_assertnonnull(bar); in dm_test_pci_ea()
277 strcpy(bar, "ea TEST"); in dm_test_pci_ea()
278 unmap_sysmem(bar); in dm_test_pci_ea()
280 ut_assertnonnull(bar); in dm_test_pci_ea()
281 ut_asserteq_str("EA test", bar); in dm_test_pci_ea()
285 ut_assertnonnull(bar); in dm_test_pci_ea()
289 ut_assertnull(bar); in dm_test_pci_ea()
[all …]
A Dpci_ep.c31 struct pci_bar bar = { in dm_test_pci_ep_base() local
52 ut_assertok(pci_ep_set_bar(bus, 0, &bar)); in dm_test_pci_ep_base()
55 ut_asserteq_mem(&tmp_bar, &bar, sizeof(bar)); in dm_test_pci_ep_base()
/u-boot/arch/powerpc/cpu/mpc83xx/
A Dlaw.c29 ecm->bar = start & 0xfffff000; in set_ddr_laws()
31 debug("DDR:bar=0x%08x\n", ecm->bar); in set_ddr_laws()
46 ecm->bar = start & 0xfffff000; in set_ddr_laws()
48 debug("DDR:bar=0x%08x\n", ecm->bar); in set_ddr_laws()
/u-boot/drivers/pci_endpoint/
A Dpcie-cadence-ep.c56 enum pci_barno bar = ep_bar->barno; in cdns_set_bar() local
77 if (is_64bits && (bar & 1)) in cdns_set_bar()
95 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar), in cdns_set_bar()
97 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar), in cdns_set_bar()
100 if (bar < BAR_4) { in cdns_set_bar()
102 b = bar; in cdns_set_bar()
105 b = bar - BAR_4; in cdns_set_bar()
A Dpcie-cadence.h165 #define CDNS_PCIE_AT_IB_RP_BAR_ADDR0(bar) \ argument
166 (CDNS_PCIE_AT_BASE + 0x0800 + (bar) * 0x0008)
170 #define CDNS_PCIE_AT_IB_RP_BAR_ADDR1(bar) \ argument
171 (CDNS_PCIE_AT_BASE + 0x0804 + (bar) * 0x0008)
183 #define CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar) \ argument
184 (CDNS_PCIE_AT_BASE + 0x0840 + (fn) * 0x0040 + (bar) * 0x0008)
185 #define CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar) \ argument
186 (CDNS_PCIE_AT_BASE + 0x0844 + (fn) * 0x0040 + (bar) * 0x0008)
/u-boot/include/
A Dpci_ep.h122 struct pci_bar *bar);
133 struct pci_bar *bar, enum pci_barno barno);
143 enum pci_barno bar);
281 int pci_ep_set_bar(struct udevice *dev, uint func_num, struct pci_bar *bar);
303 int pci_ep_clear_bar(struct udevice *dev, uint func_num, enum pci_barno bar);
/u-boot/arch/x86/cpu/intel_common/
A Dfast_spi.c50 ulong bar, mmio_base; in fast_spi_get_bios_mmap() local
53 pci_x86_read_config(pdev, PCI_BASE_ADDRESS_0, &bar, PCI_SIZE_32); in fast_spi_get_bios_mmap()
54 mmio_base = bar & PCI_BASE_ADDRESS_MEM_MASK; in fast_spi_get_bios_mmap()
/u-boot/arch/x86/cpu/quark/
A Dquark.c304 u32 bar; in quark_usb_init() local
307 qrk_pci_read_config_dword(QUARK_USB_EHCI, PCI_BASE_ADDRESS_0, &bar); in quark_usb_init()
308 writel((0x7f << 16) | 0x7f, bar + EHCI_INSNREG01); in quark_usb_init()
311 qrk_pci_read_config_dword(QUARK_USB_DEVICE, PCI_BASE_ADDRESS_0, &bar); in quark_usb_init()
312 writel(0x7f, bar + USBD_INT_MASK); in quark_usb_init()
313 writel((0xf << 16) | 0xf, bar + USBD_EP_INT_MASK); in quark_usb_init()
314 writel((0xf << 16) | 0xf, bar + USBD_EP_INT_STS); in quark_usb_init()
/u-boot/api/
A Dapi_platform-powerpc.c39 si->bar = gd->bd->bi_bar; in platform_sys_info()
42 si->bar = 0; in platform_sys_info()
/u-boot/drivers/nvme/
A Dnvme_apple.c96 ((void __iomem *)dev->bar) + ANS_ASQ_DB; in apple_nvme_setup_queue()
98 ((void __iomem *)dev->bar) + ANS_NVMMU_BASE_ASQ); in apple_nvme_setup_queue()
102 ((void __iomem *)dev->bar) + ANS_IOSQ_DB; in apple_nvme_setup_queue()
104 ((void __iomem *)dev->bar) + ANS_NVMMU_BASE_IOSQ); in apple_nvme_setup_queue()
141 writel(tail, ((void __iomem *)nvmeq->dev->bar) + ANS_NVMMU_TCB_INVAL); in apple_nvme_complete_cmd()
142 readl(((void __iomem *)nvmeq->dev->bar) + ANS_NVMMU_TCB_STAT); in apple_nvme_complete_cmd()
256 priv->ndev.bar = priv->base; in apple_nvme_probe()
/u-boot/arch/x86/cpu/apollolake/
A Dcpu_common.c79 static void p2sb_enable_bar(ulong bar) in p2sb_enable_bar() argument
82 pci_x86_write_config(PCH_DEV_P2SB, PCI_BASE_ADDRESS_0, bar, in p2sb_enable_bar()
/u-boot/drivers/video/
A Divybridge_igd.c246 static inline u32 gtt_read(void *bar, u32 reg) in gtt_read() argument
248 return readl(bar + reg); in gtt_read()
251 static inline void gtt_write(void *bar, u32 reg, u32 data) in gtt_write() argument
253 writel(data, bar + reg); in gtt_write()
256 static void gtt_write_powermeter(void *bar, const struct gt_powermeter *pm) in gtt_write_powermeter() argument
259 gtt_write(bar, pm->reg, pm->value); in gtt_write_powermeter()
263 static int gtt_poll(void *bar, u32 reg, u32 mask, u32 value) in gtt_poll() argument
269 data = gtt_read(bar, reg); in gtt_poll()
/u-boot/drivers/bios_emulator/
A Datibios.c291 static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar) in PCI_findBIOSAddr() argument
295 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) { in PCI_findBIOSAddr()
296 dm_pci_read_config32(pcidev, *bar, &base); in PCI_findBIOSAddr()
298 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF); in PCI_findBIOSAddr()
299 dm_pci_read_config32(pcidev, *bar, &size); in PCI_findBIOSAddr()
/u-boot/arch/x86/include/asm/
A Dacpi_table.h112 u64 bar);
125 void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,

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