Searched refs:bases (Results 1 – 9 of 9) sorted by relevance
| /u-boot/arch/mips/mach-octeon/ |
| A D | cvmx-range.c | 200 int __cvmx_range_is_allocated(u64 range_addr, int bases[], int count) in __cvmx_range_is_allocated() argument
208 u64 base = bases[i]; in __cvmx_range_is_allocated()
227 int cvmx_range_free_mutiple(u64 range_addr, int bases[], int count) in cvmx_range_free_mutiple() argument
232 if (__cvmx_range_is_allocated(range_addr, bases, count) != 1) in cvmx_range_free_mutiple()
235 u64 base = bases[i]; in cvmx_range_free_mutiple()
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| A D | cvmx-global-resources.c | 475 int bases[], int nelements) in cvmx_free_global_resource_range_multiple() argument
485 rv = cvmx_range_free_mutiple(addr, bases, nelements); in cvmx_free_global_resource_range_multiple()
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| /u-boot/arch/mips/mach-octeon/include/mach/ |
| A D | cvmx-range.h | 21 int cvmx_range_free_mutiple(u64 range_addr, int bases[], int count);
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| A D | cvmx-global-resources.h | 177 int cvmx_free_global_resource_range_multiple(struct global_resource_tag tag, int bases[],
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| /u-boot/doc/device-tree-bindings/pinctrl/ |
| A D | nexell,s5pxx18-pinctrl.txt | 4 Nexell's ARM bases SoC's integrates a GPIO and Pin mux/config hardware
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| /u-boot/board/synopsys/emsdp/ |
| A D | README | 8 The DesignWare ARC EM Software Development Platform is FPGA-bases platform
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| /u-boot/doc/ |
| A D | README.generic-board | 92 largest and most feature-full board, so hopefully we have all bases
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| /u-boot/board/hisilicon/poplar/ |
| A D | README | 71 having to make coordinated changes to both code bases.
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| /u-boot/doc/chromium/ |
| A D | chainload.rst | 246 beforehand. It can be quite hard to figure out between these two code bases
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