Home
last modified time | relevance | path

Searched refs:bic (Results 1 – 25 of 33) sorted by relevance

12

/u-boot/arch/arm/mach-orion5x/
A Dlowlevel_init.S175 bic r0, r0, #SDRAM_PAD_CTRL_WR_EN
176 bic r0, r0, #SDRAM_PAD_CTRL_TUNE_EN
177 bic r0, r0, #SDRAM_PAD_CTRL_DRVN_MASK
178 bic r0, r0, #SDRAM_PAD_CTRL_DRVP_MASK
197 bic r0, r0, #SDRAM_PAD_CTRL_WR_EN
198 bic r0, r0, #SDRAM_PAD_CTRL_TUNE_EN
199 bic r0, r0, #SDRAM_PAD_CTRL_DRVN_MASK
200 bic r0, r0, #SDRAM_PAD_CTRL_DRVP_MASK
224 bic r0, r0, #SDRAM_PAD_CTRL_WR_EN
225 bic r0, r0, #SDRAM_PAD_CTRL_DRV_STR_MASK
[all …]
/u-boot/board/samsung/goni/
A Dlowlevel_init.S61 bic r1, r1, #(1 << 1)
88 bic r1, r1, #0x1
93 bic r1, r1, #0x1
98 bic r1, r1, #0x1
103 bic r1, r1, #0x1
108 bic r1, r1, #0x1
113 bic r1, r1, #0x1
118 bic r1, r1, #0x1
123 bic r1, r1, #0x1
128 bic r1, r1, #0x1
[all …]
/u-boot/arch/arm/cpu/arm926ejs/
A Dstart.S47 bic r0,r0,#0x1f
96 bic r0, r0, #0x00000300 /* clear bits 9:8 (---- --RS) */
97 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
101 bic r0, r0, #0x00002000 /* clear bit 13 (--V- ----) */
/u-boot/arch/arm/cpu/arm946es/
A Dstart.S40 bic r0,r0,#0x1f
86 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
87 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
/u-boot/arch/arm/cpu/arm920t/
A Dstart.S34 bic r0, r0, #0x1f
80 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
81 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
/u-boot/arch/arm/cpu/arm1136/
A Dstart.S37 bic r0,r0,#0x1f
78 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
79 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
/u-boot/arch/arm/cpu/arm1176/
A Dstart.S45 bic r0, r0, #0x3f
80 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
81 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
/u-boot/arch/arm/include/asm/arch-mx6/
A Dmx6_plugin.S94 bic r0, r0, #(1 << 2) /* disable D Cache */
95 bic r0, r0, #0x1 /* clear bit 0 ; MMU off */
97 bic r0, r0, #(0x1 << 11) /* disable Z, branch prediction */
98 bic r0, r0, #(0x1 << 1) /* disable A, Strict alignment */
/u-boot/arch/arm/cpu/armv7/
A Dlowlevel_init.S34 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
46 bic sp, sp, #7
A Dsctlr.S19 bic r0, r0, #2 @ clear aligned flag
A Dstart.S107 bic r0, #CR_V @ V = 0
198 bic r0, r0, #0x00002000 @ clear bits 13 (--V-)
199 bic r0, r0, #0x00000007 @ clear bits 2:0 (-CAM)
203 bic r0, r0, #0x00001000 @ clear bit 12 (I) I-cache
258 bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
A Dpsci.S139 bic r4, r7, #1
220 bic r0, r0, #(1 << 6) @ Clear SMP bit
243 bic r0, r0, #(1 << 2) @ Clear C bit
/u-boot/arch/arm/mach-mvebu/
A Dlowlevel.S31 bic r0, #CR_M
43 bic r0, #L2X0_CTRL_EN
/u-boot/arch/arm/lib/
A Dmuldi3.S33 bic xl, xl, ip, lsl #16
34 bic yl, yl, yh, lsl #16
A Dcrt0_64.S87 bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
109 bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
A Dcrt0.S110 bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
138 bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
A Dmemset-arm64.S107 bic dst, dstin, 15
121 bic dst, dst, 63
/u-boot/drivers/sound/
A Drt5677.c95 static int rt5677_bic_or(struct rt5677_priv *priv, uint reg, uint bic, in rt5677_bic_or() argument
105 new_value = (old & ~bic) | (set & bic); in rt5677_bic_or()
/u-boot/arch/arm/cpu/arm11/
A Dsctlr.S22 bic r0, r0, #2 @ clear aligned flag
/u-boot/arch/arm/cpu/arm720t/
A Dstart.S32 bic r0,r0,#0x1f
/u-boot/arch/arm/cpu/arm926ejs/mxs/
A Dstart.S70 bic r2, r2, #0x1f
/u-boot/include/dm/
A Ddevice.h236 void dev_bic_flags(const struct udevice *dev, u32 bic);
248 static inline void dev_bic_flags(struct udevice *dev, u32 bic) in dev_bic_flags() argument
250 dev->flags_ &= ~bic; in dev_bic_flags()
/u-boot/arch/arm/mach-uniphier/arm32/
A Dpsci_smp.S16 bic r1, r1, #(CR_C | CR_M) @ Disable MMU and Dcache
A Dlowlevel_init.S43 bic r0, r0, #(CR_C | CR_M) @ disable MMU and Dcache
54 bic r0, r0, #0x37
/u-boot/arch/arm/cpu/armv8/
A Dcache.S172 bic x0, x0, x3
198 bic x0, x0, x3

Completed in 46 milliseconds

12