| /u-boot/board/friendlyarm/nanopi2/ |
| A D | lcds.c | 98 .bpp = 24,
125 .bpp = 24,
152 .bpp = 24,
179 .bpp = 24,
206 .bpp = 24,
233 .bpp = 24,
260 .bpp = 24,
286 .bpp = 24,
313 .bpp = 24,
339 .bpp = 24,
[all …]
|
| A D | nxp-fb.h | 67 int bpp; member
|
| /u-boot/drivers/video/ |
| A D | mxsfb.c | 60 struct display_timing *timings, int bpp) in mxs_lcd_init() argument
119 switch (bpp) { in mxs_lcd_init()
202 int bpp, u32 fb) in mxs_probe_common() argument
205 mxs_lcd_init(dev, fb, timings, bpp); in mxs_probe_common()
257 u32 *bpp) in mxs_of_get_timings() argument
297 u32 bpp = 0; in mxs_video_probe() local
304 ret = mxs_of_get_timings(dev, &timings, &bpp); in mxs_video_probe()
312 switch (bpp) { in mxs_video_probe()
348 u32 bpp = 0; in mxs_video_bind() local
352 ret = mxs_of_get_timings(dev, &timings, &bpp); in mxs_video_bind()
[all …]
|
| A D | anx9804.h | 19 void anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate, int bpp);
22 int bpp) {} in anx9804_init() argument
|
| A D | anx9804.c | 29 void anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate, int bpp) in anx9804_init() argument
42 if (bpp == 18) in anx9804_init()
|
| A D | videomodes.c | 162 int bpp; in video_get_params() local
196 bpp = 24 - ((mode % 3) * 8); in video_get_params()
213 GET_OPTION ("depth:", bpp) in video_get_params()
218 return bpp; in video_get_params()
|
| /u-boot/doc/device-tree-bindings/video/ |
| A D | sandbox-fb.txt | 7 log2-depth: Log base 2 of the U-Boot display buffer depth (4=16bpp, 5=32bpp).
|
| /u-boot/include/ |
| A D | video_easylogo.h | 21 int bpp; member
|
| A D | phy-mipi-dphy.h | 279 unsigned int bpp,
|
| /u-boot/arch/arm/include/asm/arch-tegra20/ |
| A D | display.h | 15 unsigned bpp; /* Bits per pixel */ member
|
| /u-boot/arch/arm/include/asm/arch-tegra30/ |
| A D | display.h | 15 unsigned int bpp; /* Bits per pixel */ member
|
| /u-boot/drivers/video/ti/ |
| A D | tilcdc.h | 28 u32 bpp; member
|
| A D | tilcdc.c | 215 switch (info.bpp) { in tilcdc_probe()
221 dev_err(dev, "invalid seting, bpp: %d\n", info.bpp); in tilcdc_probe()
291 reg = (timing.hactive.typ * timing.vactive.typ * info.bpp) >> 3; in tilcdc_probe()
362 if (info.bpp == 24) in tilcdc_probe()
364 else if (info.bpp == 32) in tilcdc_probe()
375 uc_priv->bpix = log_2_n_round_up(info.bpp); in tilcdc_probe()
|
| A D | tilcdc-panel.c | 124 err |= ofnode_read_u32(node, "bpp", &priv->info.bpp); in tilcdc_panel_of_to_plat()
141 priv->info.bpp, priv->timing.pixelclock.typ); in tilcdc_panel_of_to_plat()
|
| /u-boot/drivers/phy/ |
| A D | phy-core-mipi-dphy.c | 20 unsigned int bpp, in phy_mipi_dphy_get_default_config() argument
30 hs_clk_rate = pixel_clock * bpp; in phy_mipi_dphy_get_default_config()
|
| /u-boot/drivers/video/bridge/ |
| A D | anx6345.c | 273 int ret, i, bpp; in anx6345_enable() local
342 if (edid_get_timing(priv->edid, EDID_SIZE, &timing, &bpp) != 0) { in anx6345_enable()
347 timing.hactive.typ, timing.vactive.typ, bpp); in anx6345_enable()
348 if (bpp == 6) in anx6345_enable()
|
| /u-boot/doc/device-tree-bindings/video/tilcdc/ |
| A D | panel.txt | 9 - bpp: Bits per pixel
43 bpp = <16>;
|
| /u-boot/drivers/video/rockchip/ |
| A D | dw_mipi_dsi_rockchip.c | 498 int bpp; in dw_mipi_dsi_get_lane_mbps() local
510 bpp = mipi_dsi_pixel_format_to_bpp(format); in dw_mipi_dsi_get_lane_mbps()
511 if (bpp < 0) { in dw_mipi_dsi_get_lane_mbps()
515 return bpp; in dw_mipi_dsi_get_lane_mbps()
521 tmp = (mpclk * (bpp / lanes) * 10 / 8) / 1000; in dw_mipi_dsi_get_lane_mbps()
532 bpp, lanes, in dw_mipi_dsi_get_lane_mbps()
|
| /u-boot/drivers/video/sunxi/ |
| A D | sunxi_de2.c | 63 int bpp, ulong address, bool is_composite) in sunxi_de2_mode_set() argument
160 switch (bpp) { in sunxi_de2_mode_set()
173 writel((bpp / 8) * mode->hactive.typ, &de_ui_regs->cfg[0].pitch); in sunxi_de2_mode_set()
|
| A D | sunxi_lcd.c | 38 static int sunxi_lcd_enable(struct udevice *dev, int bpp, in sunxi_lcd_enable() argument
|
| /u-boot/drivers/video/tegra20/ |
| A D | tegra-dc.c | 75 val = (win->w * win->bpp / 8) << H_PRESCALED_SIZE_SHIFT; in update_window()
93 if (win->bpp < 24) in update_window()
255 win->bpp = 32; in setup_window()
259 win->bpp = 16; in setup_window()
|
| /u-boot/arch/arm/dts/ |
| A D | am335x-pxm50.dts | 31 bpp = <32>;
|
| /u-boot/drivers/video/stm32/ |
| A D | stm32_ltdc.c | 433 u32 val, tmp, bpp; in stm32_ltdc_set_layer1() local
457 bpp = VNBITS(priv->l2bpp); in stm32_ltdc_set_layer1()
458 pitch_in_bytes = priv->crop_w * (bpp >> 3); in stm32_ltdc_set_layer1()
460 line_length = ((bpp >> 3) * priv->crop_w) + (bus_width >> 3) - 1; in stm32_ltdc_set_layer1()
|
| A D | stm32_dsi.c | 271 int ret, bpp; in dsi_get_lane_mbps() local
285 bpp = mipi_dsi_pixel_format_to_bpp(format); in dsi_get_lane_mbps()
286 pll_out_khz = (timings->pixelclock.typ / 1000) * bpp / lanes; in dsi_get_lane_mbps()
|
| /u-boot/arch/arm/mach-bcm283x/include/mach/ |
| A D | mbox.h | 362 u32 bpp; member
365 u32 bpp; member
|