| /u-boot/board/k+p/kp_imx6q_tpc/ |
| A D | kp_imx6q_tpc_spl.c | 118 struct mx6_mmdc_calibration calibration = {0}; in spl_dram_print_cal() local
120 mmdc_read_calibration(sysinfo, &calibration); in spl_dram_print_cal()
122 debug(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); in spl_dram_print_cal()
123 debug(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); in spl_dram_print_cal()
124 debug(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); in spl_dram_print_cal()
125 debug(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); in spl_dram_print_cal()
126 debug(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); in spl_dram_print_cal()
128 debug(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); in spl_dram_print_cal()
129 debug(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); in spl_dram_print_cal()
130 debug(".p1_mprddlctl\t= 0x%08X\n", calibration.p1_mprddlctl); in spl_dram_print_cal()
[all …]
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| /u-boot/board/liebherr/display5/ |
| A D | spl.c | 204 struct mx6_mmdc_calibration calibration = {0}; in spl_dram_print_cal() local
206 mmdc_read_calibration(sysinfo, &calibration); in spl_dram_print_cal()
208 debug(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); in spl_dram_print_cal()
209 debug(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); in spl_dram_print_cal()
210 debug(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); in spl_dram_print_cal()
211 debug(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); in spl_dram_print_cal()
212 debug(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); in spl_dram_print_cal()
214 debug(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); in spl_dram_print_cal()
215 debug(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); in spl_dram_print_cal()
216 debug(".p1_mprddlctl\t= 0x%08X\n", calibration.p1_mprddlctl); in spl_dram_print_cal()
[all …]
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| /u-boot/drivers/thermal/ |
| A D | imx_tmu.c | 262 const fdt32_t *calibration; in imx_tmu_calibration() local
272 calibration = dev_read_prop(dev, "fsl,tmu-calibration", &len); in imx_tmu_calibration()
273 if (!calibration || len % 8 || len > 128) { in imx_tmu_calibration()
278 for (i = 0; i < len; i += 8, calibration += 2) { in imx_tmu_calibration()
281 val = fdt32_to_cpu(*calibration); in imx_tmu_calibration()
283 val = fdt32_to_cpu(*(calibration + 1)); in imx_tmu_calibration()
302 calibration = dev_read_prop(dev, "fsl,tmu-calibration", &len); in imx_tmu_calibration()
303 if (!calibration || len % 8) { in imx_tmu_calibration()
308 for (i = 0; i < len; i += 8, calibration += 2) { in imx_tmu_calibration()
309 val = fdt32_to_cpu(*calibration); in imx_tmu_calibration()
[all …]
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| /u-boot/arch/arm/cpu/armv7m/ |
| A D | systick-timer.c | 40 uint32_t calibration; member
69 cal = readl(&systick->calibration); in timer_init()
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| /u-boot/board/freescale/mx6memcal/ |
| A D | spl.c | 400 struct mx6_mmdc_calibration calibration = {0}; in board_init_f() local
405 calibration.p0_mpwrdlctl = 0x40404040; in board_init_f()
406 calibration.p1_mpwrdlctl = 0x40404040; in board_init_f()
443 mx6_dram_cfg(&sysinfo, &calibration, &ddrtype); in board_init_f()
454 mmdc_read_calibration(&sysinfo, &calibration); in board_init_f()
455 display_calibration(&calibration); in board_init_f()
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| A D | README | 20 4. Parameters to the calibration process can be chosen through
23 When booted, the mx6memcal board will run the DDR calibration
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| A D | Kconfig | 17 displaying the calibration values or errors.
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| /u-boot/board/tbs/tbs2910/ |
| A D | tbs2910.cfg | 53 /* set pad calibration type to DDR3 */
55 /* ZQ calibration */
76 /* start delay line calibration */
104 /* externel chip ZQ calibration */
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| /u-boot/board/ge/bx50v3/ |
| A D | bx50v3.cfg | 69 /* Read DQS Gating calibration */
74 /* Read calibration */
77 /* Write calibration */
90 /* Complete calibration by forced measurment */
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| /u-boot/board/aristainetos/ |
| A D | nt5cc256m16cp.cfg | 12 * DQS gating, read delay, write delay calibration values
31 /* Complete calibration by forced measurment */
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| /u-boot/board/freescale/mx6sxsabreauto/ |
| A D | imximage.cfg | 102 /* Complete calibration by forced measurement */
126 /* DDR device ZQ calibration */
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| /u-boot/board/freescale/mx6sxsabresd/ |
| A D | imximage.cfg | 107 /* Complete calibration by forced measurement */
131 /* DDR device ZQ calibration */
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| /u-boot/board/softing/vining_2000/ |
| A D | imximage.cfg | 101 /* Complete calibration by forced measurement */
125 /* DDR device ZQ calibration */
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| /u-boot/include/ |
| A D | lattice.h | 282 void calibration(void);
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| /u-boot/board/boundary/nitrogen6x/ |
| A D | 6x_bootscript_android.txt | 34 …tenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration
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| A D | 6x_bootscript_android_recovery.txt | 34 …tenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration
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| /u-boot/doc/device-tree-bindings/exynos/ |
| A D | tmu.txt | 25 - samsung,dc-value : Measured data calibration value (Constant 25)
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| /u-boot/drivers/fpga/ |
| A D | lattice.c | 99 void calibration(void) in calibration() function
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| /u-boot/board/tq/tqma6/ |
| A D | tqma6dl.cfg | 73 /* memory interface calibration values */
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| A D | tqma6q.cfg | 73 /* memory interface calibration values */
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| A D | tqma6s.cfg | 73 /* memory interface calibration values */
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| /u-boot/arch/arm/mach-imx/ |
| A D | Kconfig | 159 bool "Enable DDRMC (DDR3) on-chip calibration"
166 NXP does NOT recommend to perform this calibration at each boot. One
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| /u-boot/arch/arm/dts/ |
| A D | sun50i-h5.dtsi | 184 nvmem-cell-names = "calibration";
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| /u-boot/drivers/timer/ |
| A D | Kconfig | 291 bool "x86 TSC timer uses native calibration"
294 Selects native timer calibration for TPL and don't include the other
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| /u-boot/arch/arm/mach-imx/mx6/ |
| A D | Kconfig | 103 bool "Include dynamic DDR calibration routines"
106 Say "Y" if your board uses dynamic (per-boot) DDR calibration.
|