| /u-boot/arch/arm/mach-imx/mx5/ |
| A D | clock.c | 237 u32 ccsr = readl(&mxc_ccm->ccsr); in get_lp_apm() local
239 if (ccsr & MXC_CCM_CCSR_LP_APM) in get_lp_apm()
649 u32 ccsr = readl(&mxc_ccm->ccsr); in config_pll_clk() local
656 &mxc_ccm->ccsr); in config_pll_clk()
662 &mxc_ccm->ccsr); in config_pll_clk()
667 &mxc_ccm->ccsr); in config_pll_clk()
673 &mxc_ccm->ccsr); in config_pll_clk()
678 &mxc_ccm->ccsr); in config_pll_clk()
684 &mxc_ccm->ccsr); in config_pll_clk()
690 &mxc_ccm->ccsr); in config_pll_clk()
[all …]
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| /u-boot/drivers/pci/ |
| A D | pcie_layerscape_gen4.h | 182 void __iomem *ccsr; member
218 val = in_le32(pcie->ccsr + PAB_CTRL); in ccsr_set_page()
222 out_le32(pcie->ccsr + PAB_CTRL, val); in ccsr_set_page()
229 return in_le32(pcie->ccsr + offset); in ccsr_readl()
233 return in_le32(pcie->ccsr + OFFSET_TO_PAGE_ADDR(offset)); in ccsr_readl()
240 out_le32(pcie->ccsr + offset, value); in ccsr_writel()
243 out_le32(pcie->ccsr + OFFSET_TO_PAGE_ADDR(offset), value); in ccsr_writel()
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| A D | pcie_layerscape_gen4.c | 216 return pcie->ccsr + offset; in ls_pcie_g4_conf_address()
220 return pcie->ccsr + OFFSET_TO_PAGE_ADDR(offset); in ls_pcie_g4_conf_address()
480 pcie->ccsr = map_physmem(pcie->ccsr_res.start, in ls_pcie_g4_probe()
527 dev->name, (unsigned long)pcie->ccsr, (unsigned long)pcie->cfg, in ls_pcie_g4_probe()
530 pcie->mode = readb(pcie->ccsr + PCI_HEADER_TYPE) & 0x7f; in ls_pcie_g4_probe()
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| /u-boot/arch/powerpc/dts/ |
| A D | t104xsi-pre.dtsi | 18 ccsr = &soc;
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| /u-boot/arch/arm/dts/ |
| A D | fsl-lx2160a.dtsi | 383 reg-names = "ccsr", "lut", "pf_ctrl", "config";
398 reg-names = "ccsr", "lut", "pf_ctrl", "config";
414 reg-names = "ccsr", "lut", "pf_ctrl", "config";
429 reg-names = "ccsr", "lut", "pf_ctrl", "config";
444 reg-names = "ccsr", "lut", "pf_ctrl", "config";
459 reg-names = "ccsr", "lut", "pf_ctrl", "config";
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| A D | fsl-ls1012a.dtsi | 209 reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
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| A D | fsl-ls1043a.dtsi | 382 reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
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| A D | fsl-ls1046a.dtsi | 419 reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
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| /u-boot/arch/arm/lib/ |
| A D | asm-offsets.c | 42 DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr)); in main()
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| /u-boot/arch/arm/include/asm/arch-vf610/ |
| A D | crm_regs.h | 17 u32 ccsr; member
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| /u-boot/arch/arm/mach-imx/mx6/ |
| A D | clock.c | 1506 reg = readl(&mxc_ccm->ccsr); in select_ldb_di_clock_source()
1508 writel(reg, &mxc_ccm->ccsr); in select_ldb_di_clock_source()
1533 reg = readl(&mxc_ccm->ccsr); in select_ldb_di_clock_source()
1535 writel(reg, &mxc_ccm->ccsr); in select_ldb_di_clock_source()
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| /u-boot/arch/arm/cpu/armv7/vf610/ |
| A D | generic.c | 53 ccm_ccsr = readl(&ccm->ccsr); in get_mcu_main_clk()
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| /u-boot/board/toradex/colibri_vf/ |
| A D | colibri_vf.c | 289 clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, pfd_clk_sel | in clock_init()
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| /u-boot/board/phytec/pcm052/ |
| A D | pcm052.c | 252 clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, in clock_init()
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| /u-boot/board/freescale/vf610twr/ |
| A D | vf610twr.c | 305 clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, in clock_init()
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| /u-boot/arch/arm/include/asm/arch-mx5/ |
| A D | imx-regs.h | 280 u32 ccsr; member
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| A D | crm_regs.h | 32 u32 ccsr; member
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| /u-boot/arch/arm/include/asm/arch-mx27/ |
| A D | imx-regs.h | 125 u32 ccsr; /* Clock Control Status Register */ member
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| /u-boot/arch/arm/include/asm/arch-mx6/ |
| A D | crm_regs.h | 25 u32 ccsr; member
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