Searched refs:cfgr (Results 1 – 9 of 9) sorted by relevance
| /u-boot/drivers/gpio/ |
| A D | atmel_pio4.c | 71 writel(reg, &port_base->cfgr); in atmel_pio4_config_io_func()
148 writel(reg, &port_base->cfgr); in atmel_pio4_set_pio_output()
174 writel(reg, &port_base->cfgr); in atmel_pio4_get_pio_input()
216 clrbits_le32(&port_base->cfgr, in atmel_pio4_direction_input()
232 clrsetbits_le32(&port_base->cfgr, in atmel_pio4_direction_output()
278 return (readl(&port_base->cfgr) & in atmel_pio4_get_function()
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| /u-boot/drivers/clk/stm32/ |
| A D | clk-stm32f.c | 156 writel(0, ®s->cfgr); /* Reset CFGR */ in configure_clocks()
168 setbits_le32(®s->cfgr, (( in configure_clocks()
252 clrbits_le32(®s->cfgr, (RCC_CFGR_SW0 | RCC_CFGR_SW1)); in configure_clocks()
253 setbits_le32(®s->cfgr, RCC_CFGR_SW_PLL); in configure_clocks()
255 while ((readl(®s->cfgr) & RCC_CFGR_SWS_MASK) != in configure_clocks()
342 (readl(®s->cfgr) & RCC_CFGR_AHB_PSC_MASK) in stm32_get_hclk_rate()
357 (readl(®s->cfgr) & RCC_CFGR_APB1_PSC_MASK) in stm32_get_apb_shift()
361 (readl(®s->cfgr) & RCC_CFGR_APB2_PSC_MASK) in stm32_get_apb_shift()
406 if ((readl(®s->cfgr) & RCC_CFGR_SWS_MASK) == in stm32_clk_get_rate()
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| A D | clk-stm32h7.c | 129 u32 cfgr; /* 0x10 Clock Configuration Register */ member
365 writel(0, ®s->cfgr); in configure_clocks()
422 clrsetbits_le32(®s->cfgr, RCC_CFGR_SW_MASK, RCC_CFGR_SW_PLL1); in configure_clocks()
423 while ((readl(®s->cfgr) & RCC_CFGR_SW_MASK) != RCC_CFGR_SW_PLL1) in configure_clocks()
600 if (readl(®s->cfgr) & RCC_CFGR_TIMPRE) in stm32_get_timer_rate()
648 source = readl(®s->cfgr) & RCC_CFGR_SW_MASK; in stm32_clk_get_rate()
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| /u-boot/arch/arm/mach-at91/include/mach/ |
| A D | at91_mc.h | 20 u32 cfgr; /* 0x04 Configuration Register */ member
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| A D | atmel_pio4.h | 15 u32 cfgr; /* 0x04 PIO Configuration Register */ member
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| /u-boot/include/ |
| A D | stm32_rcc.h | 62 u32 cfgr; /* RCC clock configuration */ member
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| /u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| A D | fsl_lsch3_serdes.c | 616 int cfgr = 0; in serdes_set_env() local
639 cfgr |= tmp; in serdes_set_env()
644 snprintf(scfg, 16, "%x", cfgr); in serdes_set_env()
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| /u-boot/drivers/pinctrl/ |
| A D | pinctrl-at91-pio4.c | 191 writel(conf, &bank_base->cfgr); in atmel_process_config_dev()
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| /u-boot/arch/riscv/dts/ |
| A D | k210.dtsi | 188 clock-names = "core-clk", "cfgr-clk";
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