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Searched refs:clk (Results 1 – 25 of 1027) sorted by relevance

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/u-boot/include/
A Dclk.h120 struct clk *clk);
265 struct clk *clk) in clk_get_by_phandle() argument
271 struct clk *clk) in clk_get_by_index() argument
277 struct clk *clk) in clk_get_by_index_nodev() argument
288 struct clk *clk) in clk_get_by_name() argument
357 struct clk *clk) in clk_get_by_name_nodev_optional() argument
449 void clk_free(struct clk *clk);
468 struct clk *clk_get_parent(struct clk *clk);
521 int clk_set_parent(struct clk *clk, struct clk *parent);
605 static inline struct clk *clk_get_parent(struct clk *clk) in clk_get_parent() argument
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A Dclk-uclass.h36 ulong (*round_rate)(struct clk *clk, ulong rate);
37 ulong (*get_rate)(struct clk *clk);
38 ulong (*set_rate)(struct clk *clk, ulong rate);
39 int (*set_parent)(struct clk *clk, struct clk *parent);
40 int (*enable)(struct clk *clk);
41 int (*disable)(struct clk *clk);
103 ulong get_rate(struct clk *clk);
112 ulong set_rate(struct clk *clk, ulong rate);
121 int set_parent(struct clk *clk, struct clk *parent);
129 int enable(struct clk *clk);
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/u-boot/arch/arm/mach-exynos/
A Dclock_init_exynos4.c41 struct exynos4_clock *clk = in system_clock_init() local
44 writel(CLK_SRC_CPU_VAL, &clk->src_cpu); in system_clock_init()
50 writel(CLK_SRC_DMC_VAL, &clk->src_dmc); in system_clock_init()
55 writel(CLK_SRC_CAM_VAL, &clk->src_cam); in system_clock_init()
56 writel(CLK_SRC_MFC_VAL, &clk->src_mfc); in system_clock_init()
57 writel(CLK_SRC_G3D_VAL, &clk->src_g3d); in system_clock_init()
68 writel(CLK_DIV_TOP_VAL, &clk->div_top); in system_clock_init()
79 writel(PLL_LOCKTIME, &clk->apll_lock); in system_clock_init()
80 writel(PLL_LOCKTIME, &clk->mpll_lock); in system_clock_init()
81 writel(PLL_LOCKTIME, &clk->epll_lock); in system_clock_init()
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A Dclock_init_exynos5.c549 struct exynos5_clock *clk = in exynos5250_system_clock_init() local
607 writel(val, &clk->div_cpu0); in exynos5250_system_clock_init()
732 val = readl(&clk->src_cpu); in exynos5250_system_clock_init()
734 writel(val, &clk->src_cpu); in exynos5250_system_clock_init()
808 writel(0, &clk->src_top6); in exynos5420_system_clock_init()
810 writel(0, &clk->src_cdrex); in exynos5420_system_clock_init()
923 writel(0, &clk->src_top10); in exynos5420_system_clock_init()
924 writel(0, &clk->src_top11); in exynos5420_system_clock_init()
925 writel(0, &clk->src_top12); in exynos5420_system_clock_init()
979 struct exynos5_clock *clk = in clock_init_dp_clock() local
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/u-boot/drivers/clk/
A Dclk-composite.c24 static u8 clk_composite_get_parent(struct clk *clk) in clk_composite_get_parent() argument
27 (struct clk *)dev_get_clk_ptr(clk->dev) : clk); in clk_composite_get_parent()
36 static int clk_composite_set_parent(struct clk *clk, struct clk *parent) in clk_composite_set_parent() argument
39 (struct clk *)dev_get_clk_ptr(clk->dev) : clk); in clk_composite_set_parent()
52 (struct clk *)dev_get_clk_ptr(clk->dev) : clk); in clk_composite_recalc_rate()
65 (struct clk *)dev_get_clk_ptr(clk->dev) : clk); in clk_composite_set_rate()
75 static int clk_composite_enable(struct clk *clk) in clk_composite_enable() argument
78 (struct clk *)dev_get_clk_ptr(clk->dev) : clk); in clk_composite_enable()
91 (struct clk *)dev_get_clk_ptr(clk->dev) : clk); in clk_composite_disable()
111 struct clk *clk; in clk_register_composite() local
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A Dclk-uclass.c40 struct clk *clk) in clk_get_by_phandle() argument
77 struct clk *clk) in clk_get_by_index_tail() argument
116 int index, struct clk *clk) in clk_get_by_indexed_prop() argument
189 static struct clk *clk_set_default_get_by_id(struct clk *clk) in clk_set_default_get_by_id() argument
191 struct clk *c = clk; in clk_set_default_get_by_id()
292 struct clk clk, *c; in clk_set_default_rates() local
457 void clk_free(struct clk *clk) in clk_free() argument
491 struct clk *clk_get_parent(struct clk *clk) in clk_get_parent() argument
599 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() argument
759 if (clk && clk->id == id) { in clk_get_by_id()
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A Dclk.c18 int clk_register(struct clk *clk, const char *drv_name, in clk_register() argument
52 dev_set_uclass_priv(clk->dev, clk); in clk_register()
57 ulong clk_generic_get_rate(struct clk *clk) in clk_generic_get_rate() argument
70 bool clk_dev_binded(struct clk *clk) in clk_dev_binded() argument
72 if (clk->dev && (dev_get_flags(clk->dev) & DM_FLAG_BOUND)) in clk_dev_binded()
80 ulong ccf_clk_get_rate(struct clk *clk) in ccf_clk_get_rate() argument
90 ulong ccf_clk_set_rate(struct clk *clk, unsigned long rate) in ccf_clk_set_rate() argument
100 int ccf_clk_set_parent(struct clk *clk, struct clk *parent) in ccf_clk_set_parent() argument
115 static int ccf_clk_endisable(struct clk *clk, bool enable) in ccf_clk_endisable() argument
125 int ccf_clk_enable(struct clk *clk) in ccf_clk_enable() argument
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A Dclk_sandbox_ccf.c27 struct clk clk; member
32 int sandbox_clk_enable_count(struct clk *clk) in sandbox_clk_enable_count() argument
44 static ulong clk_pllv3_get_rate(struct clk *clk) in clk_pllv3_get_rate() argument
60 struct clk *clk; in sandbox_clk_pllv3() local
69 clk = &pll->clk; in sandbox_clk_pllv3()
89 struct clk clk; member
95 static int clk_gate2_enable(struct clk *clk) in clk_gate2_enable() argument
103 static int clk_gate2_disable(struct clk *clk) in clk_gate2_disable() argument
124 struct clk *clk; in sandbox_clk_register_gate2() local
132 clk = &gate->clk; in sandbox_clk_register_gate2()
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A Dclk_sandbox.c14 static ulong sandbox_clk_get_rate(struct clk *clk) in sandbox_clk_get_rate() argument
24 return priv->rate[clk->id]; in sandbox_clk_get_rate()
27 static ulong sandbox_clk_round_rate(struct clk *clk, ulong rate) in sandbox_clk_round_rate() argument
43 static ulong sandbox_clk_set_rate(struct clk *clk, ulong rate) in sandbox_clk_set_rate() argument
57 old_rate = priv->rate[clk->id]; in sandbox_clk_set_rate()
58 priv->rate[clk->id] = rate; in sandbox_clk_set_rate()
63 static int sandbox_clk_enable(struct clk *clk) in sandbox_clk_enable() argument
73 priv->enabled[clk->id] = true; in sandbox_clk_enable()
78 static int sandbox_clk_disable(struct clk *clk) in sandbox_clk_disable() argument
93 static int sandbox_clk_request(struct clk *clk) in sandbox_clk_request() argument
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A Dclk_fixed_rate.c18 static ulong clk_fixed_rate_get_rate(struct clk *clk) in clk_fixed_rate_get_rate() argument
24 static int dummy_enable(struct clk *clk) in dummy_enable() argument
38 struct clk *clk = &plat->clk; in clk_fixed_rate_ofdata_to_plat_() local
45 dev_set_uclass_priv(dev, clk); in clk_fixed_rate_ofdata_to_plat_()
47 clk->dev = dev; in clk_fixed_rate_ofdata_to_plat_()
48 clk->enable_count = 0; in clk_fixed_rate_ofdata_to_plat_()
51 static ulong clk_fixed_rate_raw_get_rate(struct clk *clk) in clk_fixed_rate_raw_get_rate() argument
53 return container_of(clk, struct clk_fixed_rate, clk)->fixed_rate; in clk_fixed_rate_raw_get_rate()
71 struct clk *clk; in clk_register_fixed_rate() local
81 clk = &fixed->clk; in clk_register_fixed_rate()
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A Dclk-fixed-factor.c26 static ulong clk_factor_recalc_rate(struct clk *clk) in clk_factor_recalc_rate() argument
28 struct clk_fixed_factor *fix = to_clk_fixed_factor(clk); in clk_factor_recalc_rate()
29 unsigned long parent_rate = clk_get_parent_rate(clk); in clk_factor_recalc_rate()
46 struct clk *clk; in clk_hw_register_fixed_factor() local
56 clk = &fix->clk; in clk_hw_register_fixed_factor()
57 clk->flags = flags; in clk_hw_register_fixed_factor()
66 return clk; in clk_hw_register_fixed_factor()
73 struct clk *clk; in clk_register_fixed_factor() local
77 if (IS_ERR(clk)) in clk_register_fixed_factor()
78 return ERR_CAST(clk); in clk_register_fixed_factor()
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/u-boot/drivers/clk/tegra/
A Dtegra-car-clk.c14 static int tegra_car_clk_request(struct clk *clk) in tegra_car_clk_request() argument
16 debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, in tegra_car_clk_request()
17 clk->id); in tegra_car_clk_request()
33 static ulong tegra_car_clk_get_rate(struct clk *clk) in tegra_car_clk_get_rate() argument
37 debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, in tegra_car_clk_get_rate()
38 clk->id); in tegra_car_clk_get_rate()
49 clk->dev, clk->id); in tegra_car_clk_set_rate()
55 static int tegra_car_clk_enable(struct clk *clk) in tegra_car_clk_enable() argument
58 clk->id); in tegra_car_clk_enable()
65 static int tegra_car_clk_disable(struct clk *clk) in tegra_car_clk_disable() argument
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A Dtegra186-clk.c13 static ulong tegra186_clk_get_rate(struct clk *clk) in tegra186_clk_get_rate() argument
19 debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, in tegra186_clk_get_rate()
20 clk->id); in tegra186_clk_get_rate()
32 static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate) in tegra186_clk_set_rate() argument
39 clk->dev, clk->id); in tegra186_clk_set_rate()
52 static int tegra186_clk_en_dis(struct clk *clk, in tegra186_clk_en_dis() argument
69 static int tegra186_clk_enable(struct clk *clk) in tegra186_clk_enable() argument
71 debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, in tegra186_clk_enable()
72 clk->id); in tegra186_clk_enable()
77 static int tegra186_clk_disable(struct clk *clk) in tegra186_clk_disable() argument
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/u-boot/arch/arm/dts/
A Dstih410-clock.dtsi10 clk_sysin: clk-sysin {
94 "clk-ic-lmi1";
149 "clk-fdma",
150 "clk-nand",
151 "clk-hva",
158 "clk-mmc-0",
159 "clk-mmc-1",
239 "clk-pcm-1",
283 "clk-denc",
288 "clk-dvo",
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A Dstih407-clock.dtsi10 clk_sysin: clk-sysin {
148 "clk-fdma",
149 "clk-nand",
150 "clk-hva",
157 "clk-mmc-0",
158 "clk-mmc-1",
231 "clk-pcm-1",
232 "clk-pcm-2",
273 "clk-denc",
278 "clk-dvo",
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/u-boot/test/dm/
A Dclk_ccf.c21 struct clk *clk, *pclk; in dm_test_clk_ccf() local
66 rate = clk_get_rate(clk); in dm_test_clk_ccf()
75 rate = clk_get_rate(clk); in dm_test_clk_ccf()
90 rate = clk_get_rate(clk); in dm_test_clk_ccf()
99 rate = clk_get_rate(clk); in dm_test_clk_ccf()
117 ret = clk_enable(clk); in dm_test_clk_ccf()
129 ret = clk_disable(clk); in dm_test_clk_ccf()
169 ret = clk_disable(clk); in dm_test_clk_ccf()
177 ret = clk_enable(clk); in dm_test_clk_ccf()
180 ret = clk_disable(clk); in dm_test_clk_ccf()
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/u-boot/drivers/clk/ti/
A Dclk-sci.c47 static int ti_sci_clk_of_xlate(struct clk *clk, in ti_sci_clk_of_xlate() argument
67 static ulong ti_sci_clk_get_rate(struct clk *clk) in ti_sci_clk_get_rate() argument
77 ret = cops->get_freq(sci, clk->id, clk->data, &current_freq); in ti_sci_clk_get_rate()
88 static ulong ti_sci_clk_set_rate(struct clk *clk, ulong rate) in ti_sci_clk_set_rate() argument
98 k3_avs_notify_freq(clk->id, clk->data, rate); in ti_sci_clk_set_rate()
110 static int ti_sci_clk_set_parent(struct clk *clk, struct clk *parent) in ti_sci_clk_set_parent() argument
146 ret = cops->set_parent(sci, clk->id, clk->data, parent->data); in ti_sci_clk_set_parent()
154 static int ti_sci_clk_enable(struct clk *clk) in ti_sci_clk_enable() argument
167 ret = cops->put_clock(sci, clk->id, clk->data); in ti_sci_clk_enable()
174 static int ti_sci_clk_disable(struct clk *clk) in ti_sci_clk_disable() argument
[all …]
A Dclk-k3.c29 struct clk *clk; member
58 map->clk = clk; in clk_add_map()
95 struct clk *clk; in ti_clk_probe() local
202 static int ti_clk_of_xlate(struct clk *clk, in ti_clk_of_xlate() argument
231 struct clk *clkp = data->map[clk->id].clk; in ti_clk_get_rate()
239 struct clk *clkp = data->map[clk->id].clk; in ti_clk_set_rate()
345 static int ti_clk_set_parent(struct clk *clk, struct clk *parent) in ti_clk_set_parent() argument
348 struct clk *clkp = data->map[clk->id].clk; in ti_clk_set_parent()
354 static int ti_clk_enable(struct clk *clk) in ti_clk_enable() argument
357 struct clk *clkp = data->map[clk->id].clk; in ti_clk_enable()
[all …]
/u-boot/arch/arm/include/asm/kona-common/
A Dclk.h13 struct clk;
17 struct clk *clk_get(const char *id);
18 int clk_enable(struct clk *clk);
19 void clk_disable(struct clk *clk);
20 unsigned long clk_get_rate(struct clk *clk);
21 long clk_round_rate(struct clk *clk, unsigned long rate);
22 int clk_set_rate(struct clk *clk, unsigned long rate);
23 int clk_set_parent(struct clk *clk, struct clk *parent);
24 struct clk *clk_get_parent(struct clk *clk);
/u-boot/include/linux/
A Dclk-provider.h55 struct clk clk; member
76 u8 clk_mux_get_parent(struct clk *clk);
92 struct clk clk; member
118 struct clk clk; member
190 struct clk clk; member
201 struct clk clk; member
211 struct clk clk; member
258 ulong ccf_clk_get_rate(struct clk *clk);
260 int ccf_clk_set_parent(struct clk *clk, struct clk *parent);
261 int ccf_clk_enable(struct clk *clk);
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/u-boot/arch/arm/mach-nexell/include/mach/
A Dclk.h10 struct clk { struct
16 struct clk *clk_get(const char *id); argument
17 void clk_put(struct clk *clk);
18 unsigned long clk_get_rate(struct clk *clk);
19 long clk_round_rate(struct clk *clk, unsigned long rate);
20 int clk_set_rate(struct clk *clk, unsigned long rate);
21 int clk_enable(struct clk *clk);
22 void clk_disable(struct clk *clk);
/u-boot/drivers/clk/at91/
A Dclk-main.c37 struct clk clk; member
44 struct clk clk; member
55 struct clk clk; member
111 struct clk *clk; in at91_clk_main_rc() local
122 clk = &main_rc->clk; in at91_clk_main_rc()
197 struct clk *clk; in at91_clk_main_osc() local
208 clk = &main->clk; in at91_clk_main_osc()
263 struct clk *clk; in at91_clk_rm9200_main() local
274 clk = &main->clk; in at91_clk_rm9200_main()
352 struct clk *clk = ERR_PTR(-ENOMEM); in at91_clk_sam9x5_main() local
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A Dclk-utmi.c35 struct clk clk; member
49 static int clk_utmi_enable(struct clk *clk) in clk_utmi_enable() argument
102 static int clk_utmi_disable(struct clk *clk) in clk_utmi_disable() argument
111 static ulong clk_utmi_get_rate(struct clk *clk) in clk_utmi_get_rate() argument
128 struct clk *clk; in at91_clk_register_utmi() local
150 clk = &utmi->clk; in at91_clk_register_utmi()
158 return clk; in at91_clk_register_utmi()
168 static int clk_utmi_sama7g5_enable(struct clk *clk) in clk_utmi_sama7g5_enable() argument
206 struct clk *clk; in at91_clk_sama7g5_register_utmi() local
218 clk = &utmi->clk; in at91_clk_sama7g5_register_utmi()
[all …]
/u-boot/drivers/clk/imx/
A DMakefile5 obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-gate2.o clk-pllv3.o clk-pfd.o
7 obj-$(CONFIG_CLK_IMX8) += clk-imx8.o
11 obj-$(CONFIG_IMX8QM) += clk-imx8qm.o
13 obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MM) += clk-imx8mm.o clk-pll14xx.o \
14 clk-composite-8m.o
15 obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MN) += clk-imx8mn.o clk-pll14xx.o \
16 clk-composite-8m.o
17 obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MP) += clk-imx8mp.o clk-pll14xx.o \
18 clk-composite-8m.o
19 obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MQ) += clk-imx8mq.o clk-pll14xx.o \
[all …]
A Dclk-imxrt1170.c18 static ulong imxrt1170_clk_get_rate(struct clk *clk) in imxrt1170_clk_get_rate() argument
20 struct clk *c; in imxrt1170_clk_get_rate()
32 static ulong imxrt1170_clk_set_rate(struct clk *clk, ulong rate) in imxrt1170_clk_set_rate() argument
34 struct clk *c; in imxrt1170_clk_set_rate()
46 static int __imxrt1170_clk_enable(struct clk *clk, bool enable) in __imxrt1170_clk_enable() argument
48 struct clk *c; in __imxrt1170_clk_enable()
65 static int imxrt1170_clk_disable(struct clk *clk) in imxrt1170_clk_disable() argument
70 static int imxrt1170_clk_enable(struct clk *clk) in imxrt1170_clk_enable() argument
75 static int imxrt1170_clk_set_parent(struct clk *clk, struct clk *parent) in imxrt1170_clk_set_parent() argument
190 struct clk *clk, *clk1; in imxrt1170_clk_probe() local
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