Searched refs:clk_rcg_set_rate (Results 1 – 3 of 3) sorted by relevance
| /u-boot/arch/arm/mach-snapdragon/ |
| A D | clock-qcs404.c | 209 clk_rcg_set_rate(priv->base, &blsp1_qup0_i2c_apps_regs, 0, in msm_enable()
214 clk_rcg_set_rate(priv->base, &blsp1_qup1_i2c_apps_regs, 0, in msm_enable()
219 clk_rcg_set_rate(priv->base, &blsp1_qup2_i2c_apps_regs, 0, in msm_enable()
224 clk_rcg_set_rate(priv->base, &blsp1_qup3_i2c_apps_regs, 0, in msm_enable()
229 clk_rcg_set_rate(priv->base, &blsp1_qup4_i2c_apps_regs, 0, in msm_enable()
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| A D | clock-snapdragon.h | 45 void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
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| A D | clock-snapdragon.c | 115 void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div, in clk_rcg_set_rate() function
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