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Searched refs:clock_enable (Results 1 – 25 of 29) sorted by relevance

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/u-boot/arch/arm/mach-imx/mx7/
A Dclock.c86 clock_enable(CCGR_USB_HSIC, 0); in enable_usboh3_clk()
650 clock_enable(CCGR_WEIM, 0); in init_clk_weim()
659 clock_enable(CCGR_WEIM, 1); in init_clk_weim()
729 clock_enable(CCGR_EPDC, 0); in init_clk_epdc()
738 clock_enable(CCGR_EPDC, 1); in init_clk_epdc()
861 clock_enable(CCGR_QSPI, 0); in set_clk_qspi()
870 clock_enable(CCGR_QSPI, 1); in set_clk_qspi()
1068 clock_enable(CCGR_SNVS, 1); in clock_init()
1075 clock_enable(CCGR_RDC, 1); in clock_init()
1094 clock_enable(CCGR_EPDC, 1); in epdc_clock_enable()
[all …]
/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mq.c397 clock_enable(CCGR_WDOG1, 0); in init_wdog_clk()
398 clock_enable(CCGR_WDOG2, 0); in init_wdog_clk()
399 clock_enable(CCGR_WDOG3, 0); in init_wdog_clk()
406 clock_enable(CCGR_WDOG1, 1); in init_wdog_clk()
407 clock_enable(CCGR_WDOG2, 1); in init_wdog_clk()
408 clock_enable(CCGR_WDOG3, 1); in init_wdog_clk()
508 clock_enable(CCGR_QSPI, 0); in set_clk_qspi()
511 clock_enable(CCGR_QSPI, 1); in set_clk_qspi()
537 clock_enable(CCGR_ENET1, 0); in set_clk_enet()
784 clock_enable(CCGR_GIC, 0); in clock_init()
[all …]
A Dclock_imx8mm.c316 clock_enable(CCGR_UART1, 0); in init_uart_clk()
347 clock_enable(CCGR_WDOG1, 0); in init_wdog_clk()
348 clock_enable(CCGR_WDOG2, 0); in init_wdog_clk()
349 clock_enable(CCGR_WDOG3, 0); in init_wdog_clk()
352 clock_enable(CCGR_WDOG1, 1); in init_wdog_clk()
353 clock_enable(CCGR_WDOG2, 1); in init_wdog_clk()
354 clock_enable(CCGR_WDOG3, 1); in init_wdog_clk()
473 clock_enable(CCGR_GIC, 0); in clock_init()
476 clock_enable(CCGR_GIC, 1); in clock_init()
482 clock_enable(CCGR_DDR1, 0); in clock_init()
[all …]
A Dsoc.c557 clock_enable(CCGR_SNVS, 1); in imx8m_setup_snvs()
600 clock_enable(CCGR_SCTR, 1); in arch_cpu_init()
632 clock_enable(CCGR_OCOTP, 1); in arch_cpu_init()
/u-boot/board/beacon/imx8mp/
A Dspl.c55 clock_enable(CCGR_GIC, 0); in spl_board_init()
57 clock_enable(CCGR_GIC, 1); in spl_board_init()
/u-boot/board/phytec/phycore_imx8mp/
A Dspl.c82 clock_enable(CCGR_GIC, 0); in spl_board_init()
84 clock_enable(CCGR_GIC, 1); in spl_board_init()
/u-boot/board/freescale/imx8mp_evk/
A Dspl.c48 clock_enable(CCGR_GIC, 0); in spl_board_init()
50 clock_enable(CCGR_GIC, 1); in spl_board_init()
/u-boot/board/engicam/imx8mp/
A Dspl.c108 clock_enable(CCGR_GIC, 0); in spl_board_init()
110 clock_enable(CCGR_GIC, 1); in spl_board_init()
/u-boot/board/toradex/verdin-imx8mp/
A Dspl.c68 clock_enable(CCGR_GIC, 0); in spl_board_init()
70 clock_enable(CCGR_GIC, 1); in spl_board_init()
/u-boot/board/dhelectronics/dh_imx8mp/
A Dspl.c136 clock_enable(CCGR_GIC, 0); in spl_board_init()
138 clock_enable(CCGR_GIC, 1); in spl_board_init()
/u-boot/arch/arm/mach-tegra/tegra114/
A Dcpu.c73 clock_enable(PERIPH_ID_CPU); in enable_cpu_clocks()
74 clock_enable(PERIPH_ID_CPULP); in enable_cpu_clocks()
75 clock_enable(PERIPH_ID_CPUG); in enable_cpu_clocks()
/u-boot/arch/arm/mach-tegra/tegra124/
A Dcpu.c80 clock_enable(PERIPH_ID_CPU); in enable_cpu_clocks()
81 clock_enable(PERIPH_ID_CPULP); in enable_cpu_clocks()
82 clock_enable(PERIPH_ID_CPUG); in enable_cpu_clocks()
/u-boot/board/msc/sm2s_imx8mp/
A Dspl.c56 clock_enable(CCGR_GIC, 0); in spl_board_init()
58 clock_enable(CCGR_GIC, 1); in spl_board_init()
/u-boot/arch/arm/mach-tegra/
A Dpowergate.c90 clock_enable(periph); in tegra_powergate_sequence_power_up()
A Dclock.c489 clock_enable(periph_id); in clock_start_periph_pll()
499 void clock_enable(enum periph_id clkid) in clock_enable() function
657 clock_enable(periph_id); in clock_ll_start_uart()
/u-boot/drivers/video/tegra124/
A Ddisplay.c438 clock_enable(PERIPH_ID_HOST1X); in tegra124_lcd_init()
439 clock_enable(PERIPH_ID_DISP1); in tegra124_lcd_init()
440 clock_enable(PERIPH_ID_PWM); in tegra124_lcd_init()
441 clock_enable(PERIPH_ID_DPAUX); in tegra124_lcd_init()
442 clock_enable(PERIPH_ID_SOR0); in tegra124_lcd_init()
/u-boot/drivers/clk/tegra/
A Dtegra-car-clk.c60 clock_enable(clk->id); in tegra_car_clk_enable()
/u-boot/board/nvidia/nyan-big/
A Dnyan-big.c117 clock_enable(ids[i]); in enable_required_clocks()
/u-boot/arch/arm/include/asm/arch-mx7/
A Dclock_slice.h114 int clock_enable(enum clk_ccgr_index index, bool enable);
/u-boot/board/purism/librem5/
A Dlibrem5.c372 clock_enable(CCGR_USB_CTRL2, 1); in board_init()
373 clock_enable(CCGR_USB_PHY2, 1); in board_init()
/u-boot/drivers/usb/host/
A Dehci-tegra.c385 clock_enable(config->periph_id); in init_utmi_usb_controller()
480 clock_enable(PERIPH_ID_USBD); in init_utmi_usb_controller()
624 clock_enable(PERIPH_ID_DEV2_OUT); in init_ulpi_usb_controller()
644 clock_enable(config->periph_id); in init_ulpi_usb_controller()
/u-boot/arch/arm/include/asm/arch-tegra/
A Dclock.h99 void clock_enable(enum periph_id clkid);
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dclock.h264 int clock_enable(enum clk_ccgr_index index, bool enable);
/u-boot/drivers/video/tegra20/
A Dtegra-dsi.c484 clock_enable(PERIPH_ID_VI); in tegra_dsi_pad_calibrate()
485 clock_enable(PERIPH_ID_CSI); in tegra_dsi_pad_calibrate()
785 clock_enable(priv->dsi_clk); in tegra_dsi_init_clocks()
/u-boot/drivers/input/
A Dtegra-kbc.c265 clock_enable(PERIPH_ID_KBC); in tegra_kbd_start()

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