Searched refs:correction (Results 1 – 14 of 14) sorted by relevance
76 static void mctl_apply_odt_correction(u32 *reg, int correction) in mctl_apply_odt_correction() argument81 val += correction; in mctl_apply_odt_correction()
626 int "sunxi dram odt correction value"629 Set the dram odt correction value (range -255 - 255). In allwinner632 then the correction is negative. Usually the value for this is 0.
1121 INTERNAL_SIZE_T correction; /* bytes for 2nd sbrk call */ local1166 correction = (MALLOC_ALIGNMENT) - front_misalign;1167 brk += correction;1170 correction = 0;1174 correction += ((((unsigned long)(brk + sbrk_size))+(pagesz-1)) &1178 new_brk = (char*)(MORECORE (correction));1181 sbrked_mem += correction;1184 top_size = new_brk - brk + correction;
1935 INTERNAL_SIZE_T correction; /* bytes for 2nd sbrk call */1980 correction = (MALLOC_ALIGNMENT) - front_misalign;1981 brk += correction;1984 correction = 0;1988 correction += ((((unsigned long)(brk + sbrk_size))+(pagesz-1)) &1991 /* Allocate correction */1992 new_brk = (char*)(MORECORE (correction));1995 sbrked_mem += correction;1998 top_size = new_brk - brk + correction;
35 perform error detection and correction, sacrificing 1/9th of the
430 bool "24-error correction (45 ECC bytes)"433 bool "32-error correction (60 ECC bytes)"584 a maximum 8-bit correction error per sector of 512 bytes.596 a maximum 40-bit error correction per sector of 1024 bytes.631 The controller supports 4~12 bits correction per 512 bytes with a763 Hardware ECC correction. This is useful for platforms which have ELM767 SPL-NAND driver with software ECC correction support.
44 - Single-bit error correction and double-bit error detection ECC (4-bit122 - Supports ECC error detection and correction
18 1. the PMECC correction error bits capability: CONFIG_PMECC_CAP.
184 hardware ECC correction. This is useful for platforms which have ELM188 SPL-NAND driver with software ECC correction support.
37 - Protection scheme: parity-checking or error-checking-and-correction (ECC)38 - Automatic hardware error correction
130 calendar with automatic leap year correction, 2-byte battery backed SRAM,
221 correction or whitespace update), you can omit the blank line and detailed
8 # mistake||correction
36 hardware engine required for BCH ECC correction.
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