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/u-boot/arch/arm/dts/
A Dthunderx-88xx.dtsi24 cpu@000 {
30 cpu@001 {
36 cpu@002 {
42 cpu@003 {
48 cpu@004 {
54 cpu@005 {
60 cpu@006 {
66 cpu@007 {
72 cpu@008 {
78 cpu@009 {
[all …]
A Dsynquacer-sc2a11.dtsi42 CPU0: cpu@0 {
49 CPU1: cpu@1 {
56 CPU2: cpu@100 {
63 CPU3: cpu@101 {
70 CPU4: cpu@200 {
77 CPU5: cpu@201 {
84 CPU6: cpu@300 {
91 CPU7: cpu@301 {
98 CPU8: cpu@400 {
105 CPU9: cpu@401 {
[all …]
A Djuno-r2.dts40 cpu-map {
43 cpu = <&A72_0>;
46 cpu = <&A72_1>;
88 A72_0: cpu@0 {
106 A72_1: cpu@1 {
245 cpu = <&A72_0>;
249 cpu = <&A72_1>;
253 cpu = <&A53_0>;
257 cpu = <&A53_1>;
261 cpu = <&A53_2>;
[all …]
A Dmeson-g12b.dtsi16 cpu-map {
19 cpu = <&cpu0>;
23 cpu = <&cpu1>;
29 cpu = <&cpu100>;
33 cpu = <&cpu101>;
37 cpu = <&cpu102>;
41 cpu = <&cpu103>;
46 cpu0: cpu@0 {
56 cpu1: cpu@1 {
66 cpu100: cpu@100 {
[all …]
A Dhi6220.dtsi25 cpu-map {
28 cpu = <&cpu0>;
31 cpu = <&cpu1>;
34 cpu = <&cpu2>;
37 cpu = <&cpu3>;
42 cpu = <&cpu4>;
56 cpu0: cpu@0 {
63 cpu1: cpu@1 {
70 cpu2: cpu@2 {
77 cpu3: cpu@3 {
[all …]
A Dmeson-gxm.dtsi13 cpu-map {
16 cpu = <&cpu0>;
19 cpu = <&cpu1>;
22 cpu = <&cpu2>;
25 cpu = <&cpu3>;
31 cpu = <&cpu4>;
45 cpu0: cpu@0 {
49 cpu1: cpu@1 {
53 cpu2: cpu@2 {
57 cpu3: cpu@3 {
[all …]
A Dk3-am62a7.dtsi19 cpu-map {
22 cpu = <&cpu0>;
26 cpu = <&cpu1>;
30 cpu = <&cpu2>;
34 cpu = <&cpu3>;
39 cpu0: cpu@0 {
42 device_type = "cpu";
53 cpu1: cpu@1 {
56 device_type = "cpu";
67 cpu2: cpu@2 {
[all …]
A Dk3-am625.dtsi19 cpu-map {
22 cpu = <&cpu0>;
26 cpu = <&cpu1>;
30 cpu = <&cpu2>;
34 cpu = <&cpu3>;
39 cpu0: cpu@0 {
42 device_type = "cpu";
53 cpu1: cpu@1 {
56 device_type = "cpu";
67 cpu2: cpu@2 {
[all …]
A Dmt8183.dtsi26 cpu-map {
29 cpu = <&cpu0>;
32 cpu = <&cpu1>;
35 cpu = <&cpu2>;
38 cpu = <&cpu3>;
58 cpu0: cpu@0 {
66 cpu1: cpu@1 {
74 cpu2: cpu@2 {
82 cpu3: cpu@3 {
90 cpu4: cpu@100 {
[all …]
A Darmada-ap80x-quad.dtsi19 cpu@000 {
22 device_type = "cpu";
27 cpu@001 {
30 device_type = "cpu";
35 cpu@100 {
38 device_type = "cpu";
43 cpu@101 {
46 device_type = "cpu";
A Dbcm2837.dtsi43 cpu0: cpu@0 {
44 device_type = "cpu";
48 cpu-release-addr = <0x0 0x000000d8>;
51 cpu1: cpu@1 {
52 device_type = "cpu";
56 cpu-release-addr = <0x0 0x000000e0>;
59 cpu2: cpu@2 {
60 device_type = "cpu";
64 cpu-release-addr = <0x0 0x000000e8>;
67 cpu3: cpu@3 {
[all …]
A Dfsl-imx8-ca53.dtsi23 CPU_SLEEP: cpu-sleep {
44 A53_0: cpu@0 {
45 device_type = "cpu";
50 cpu-idle-states = <&CPU_SLEEP>;
53 A53_1: cpu@1 {
54 device_type = "cpu";
59 cpu-idle-states = <&CPU_SLEEP>;
62 A53_2: cpu@2 {
63 device_type = "cpu";
71 A53_3: cpu@3 {
[all …]
A Dk3-am654.dtsi14 cpu-map {
17 cpu = <&cpu0>;
21 cpu = <&cpu1>;
27 cpu = <&cpu2>;
31 cpu = <&cpu3>;
36 cpu0: cpu@0 {
39 device_type = "cpu";
50 cpu1: cpu@1 {
53 device_type = "cpu";
64 cpu2: cpu@100 {
[all …]
A Dbcm4908.dtsi28 cpu0: cpu@0 {
29 device_type = "cpu";
33 cpu-release-addr = <0x0 0xfff8>;
37 cpu1: cpu@1 {
38 device_type = "cpu";
42 cpu-release-addr = <0x0 0xfff8>;
46 cpu2: cpu@2 {
47 device_type = "cpu";
51 cpu-release-addr = <0x0 0xfff8>;
55 cpu3: cpu@3 {
[all …]
A Dfsl-imx8-ca35.dtsi15 A35_0: cpu@0 {
16 device_type = "cpu";
24 A35_1: cpu@1 {
25 device_type = "cpu";
33 A35_2: cpu@2 {
34 device_type = "cpu";
42 A35_3: cpu@3 {
43 device_type = "cpu";
/u-boot/arch/arm/mach-imx/imx8m/
A Dpsci.c27 #define EN_Cn_WFI_PDN(cpu) BIT(((((cpu) & 1) * 2) + (((cpu) & 2) * 8))) argument
28 #define GPC_PGC_nCTRL(cpu) (0x800 + ((cpu) * 0x40)) argument
31 #define COREn_A53_SW_PUP_REQ(cpu) BIT(cpu) argument
54 psci_state[cpu] = state; in psci_set_state()
61 *cpu = mpidr & MPIDR_AFF0; in psci_cpu_on_validate_mpidr()
66 if (*cpu >= CONFIG_ARMV8_PSCI_NR_CPUS) in psci_cpu_on_validate_mpidr()
134 u32 cpu = 0; in psci_cpu_on_64() local
145 psci_cpu_on_power_on(cpu); in psci_cpu_on_64()
166 return psci_state[cpu]; in psci_affinity_info_64()
193 u32 cpu = psci_get_cpu_id(); in psci_cpu_off() local
[all …]
/u-boot/arch/arm/cpu/armv7/sunxi/
A Dpsci.c38 #define SUN8I_R40_PWR_CLAMP(cpu) (0x120 + (cpu) * 0x4) argument
104 int cpu) in sunxi_power_switch() argument
156 on, cpu); in sunxi_cpu_set_power()
165 on, cpu); in sunxi_cpu_set_power()
173 u32 cpu = cpuid & 0x3; in sunxi_cpu_power_off() local
177 if (readl(&cpucfg->cpu[cpu].status) & BIT(2)) in sunxi_cpu_power_off()
183 writel(0, &cpucfg->cpu[cpu].rst); in sunxi_cpu_power_off()
218 u32 scr, reg, cpu; in psci_fiq_enter() local
236 cpu = (reg >> 10) & 0x7; in psci_fiq_enter()
260 writel(0, &cpucfg->cpu[cpu].rst); in psci_cpu_on()
[all …]
/u-boot/arch/arm/cpu/armv7/
A Dpsci-common.c30 void __secure psci_save(int cpu, u32 pc, u32 context_id) in psci_save() argument
32 psci_target_pc[cpu] = pc; in psci_save()
33 psci_context_id[cpu] = context_id; in psci_save()
37 u32 __secure psci_get_target_pc(int cpu) in psci_get_target_pc() argument
39 return psci_target_pc[cpu]; in psci_get_target_pc()
42 u32 __secure psci_get_context_id(int cpu) in psci_get_context_id() argument
44 return psci_context_id[cpu]; in psci_get_context_id()
/u-boot/include/
A Dcpu_func.h23 static inline int cpumask_next(int cpu, unsigned int mask) in cpumask_next() argument
25 for (cpu++; !((1 << cpu) & mask); cpu++) in cpumask_next()
28 return cpu; in cpumask_next()
31 #define for_each_cpu(iter, cpu, num_cpus, mask) \ argument
32 for (iter = 0, cpu = cpumask_next(-1, mask); \
34 iter++, cpu = cpumask_next(cpu, mask)) \
/u-boot/arch/powerpc/cpu/mpc8xxx/
A Dcpu.c239 struct cpu_type *cpu = gd->arch.cpu; in cpu_mask() local
246 if (cpu->num_cores == 0) in cpu_mask()
249 return cpu->mask; in cpu_mask()
256 struct cpu_type *cpu = gd->arch.cpu; in cpu_dsp_mask() local
266 return cpu->dsp_mask; in cpu_dsp_mask()
274 struct cpu_type *cpu = gd->arch.cpu; in cpu_num_dspcores() local
292 struct cpu_type *cpu = gd->arch.cpu; in cpu_numcores() local
298 if (cpu->num_cores == 0) in cpu_numcores()
301 return cpu->num_cores; in cpu_numcores()
331 struct cpu_type *cpu = gd->arch.cpu; in fixup_cpu() local
[all …]
/u-boot/arch/x86/
A DMakefile5 head-y := arch/x86/cpu/start64.o
8 head-y := arch/x86/cpu/start.o
11 head-y := arch/x86/cpu/start.o
14 head-y = arch/x86/cpu/start_from_tpl.o
16 head-y = arch/x86/cpu/start_from_spl.o
23 head-$(CONFIG_$(SPL_TPL_)X86_16BIT_INIT) += arch/x86/cpu/start16.o
24 head-$(CONFIG_$(SPL_TPL_)X86_16BIT_INIT) += arch/x86/cpu/resetvec.o
26 libs-y += arch/x86/cpu/
/u-boot/arch/arm/mach-imx/mx7/
A Dpsci-mx7.c141 psci_state[cpu] = state; in psci_set_state()
183 u32 cpu = psci_get_cpu_id(); in psci_arch_cpu_entry() local
191 u32 cpu = mpidr & MPIDR_AFF0; in psci_cpu_on() local
196 if (cpu >= IMX7D_PSCI_NR_CPUS) in psci_cpu_on()
212 imx_enable_cpu_ca7(cpu, true); in psci_cpu_on()
219 int cpu; in psci_cpu_off() local
221 cpu = psci_get_cpu_id(); in psci_cpu_off()
290 if (cpu >= IMX7D_PSCI_NR_CPUS) in psci_affinity_info()
300 return psci_state[cpu]; in psci_affinity_info()
398 if (cpu == 0) { in imx_gpcv2_set_cpu_power_gate_by_lpm()
[all …]
/u-boot/arch/x86/cpu/intel_common/
A Dmicrocode.c99 static void microcode_read_cpu(struct microcode_update *cpu) in microcode_read_cpu() argument
108 rdmsr(MSR_IA32_UCODE_REV, low, cpu->update_revision); in microcode_read_cpu()
111 cpu->processor_signature = result.eax; in microcode_read_cpu()
113 cpu->processor_flags = 0; in microcode_read_cpu()
116 cpu->processor_flags = 1 << ((high >> 18) & 7); in microcode_read_cpu()
119 cpu->processor_signature, cpu->processor_flags, in microcode_read_cpu()
120 cpu->update_revision); in microcode_read_cpu()
126 struct microcode_update cpu, update; in microcode_update_intel() local
135 microcode_read_cpu(&cpu); in microcode_update_intel()
163 if (!(update.processor_signature == cpu.processor_signature && in microcode_update_intel()
[all …]
/u-boot/drivers/cpu/
A Dcpu-uclass.c32 int cpu_is_current(struct udevice *cpu) in cpu_is_current() argument
34 struct cpu_ops *ops = cpu_get_ops(cpu); in cpu_is_current()
37 if (ops->is_current(cpu)) in cpu_is_current()
46 struct udevice *cpu; in cpu_get_current_dev() local
49 uclass_foreach_dev_probe(UCLASS_CPU, cpu) { in cpu_get_current_dev()
50 if (cpu_is_current(cpu) > 0) in cpu_get_current_dev()
51 return cpu; in cpu_get_current_dev()
55 ret = uclass_first_device_err(UCLASS_CPU, &cpu); in cpu_get_current_dev()
62 return cpu; in cpu_get_current_dev()
156 UCLASS_DRIVER(cpu) = {
/u-boot/test/dm/
A Dread.c18 phys_addr_t cpu; in dm_test_dma_ranges() local
27 ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); in dm_test_dma_ranges()
29 ut_asserteq_64(0x0, cpu); in dm_test_dma_ranges()
36 ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); in dm_test_dma_ranges()
38 ut_asserteq_64(0x0, cpu); in dm_test_dma_ranges()
45 ut_asserteq(-ENOENT, dev_get_dma_range(dev, &cpu, &bus, &size)); in dm_test_dma_ranges()

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