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Searched refs:crc_rst_dev (Results 1 – 7 of 7) sorted by relevance

/u-boot/arch/arm/mach-tegra/tegra20/
A Dwarmboot_avp.c55 reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_U]); in wb_start()
57 writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_U]); in wb_start()
83 reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_L]); in wb_start()
85 writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_L]); in wb_start()
127 reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_U]); in wb_start()
129 writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_U]); in wb_start()
210 reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_L]); in wb_start()
212 writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_L]); in wb_start()
225 writel(SWR_TRIG_SYS_RST, &clkrst->crc_rst_dev[TEGRA_DEV_L]); in wb_start()
A Dclock.c535 u32 *reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
/u-boot/arch/arm/include/asm/arch-tegra/
A Dclk_rst.h56 uint crc_rst_dev[TEGRA_CLK_REGS]; /* _RST_DEVICES_L/H/U_0 */ member
/u-boot/arch/arm/mach-tegra/tegra114/
A Dclock.c604 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
/u-boot/arch/arm/mach-tegra/tegra30/
A Dclock.c584 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
/u-boot/arch/arm/mach-tegra/tegra210/
A Dclock.c837 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
/u-boot/arch/arm/mach-tegra/tegra124/
A Dclock.c753 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()

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