Searched refs:cs0_config (Results 1 – 11 of 11) sorted by relevance
| /u-boot/board/socrates/ |
| A D | sdram.c | 34 ddr->cs0_config = 0; in fixed_sdram()
38 ddr->cs0_config = CFG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
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| /u-boot/drivers/ddr/fsl/ |
| A D | util.c | 190 uint32_t cs0_config = ddr_in32(&ddr->cs0_config); in print_ddr_info() local
281 if ((cs0_config & 0x20000000) && (start_ctrl == 0)) { in print_ddr_info()
285 switch ((cs0_config >> 24) & 0xf) { in print_ddr_info()
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| A D | fsl_ddr_gen4.c | 73 u32 cs0_bnds, cs1_bnds, cs2_bnds, cs3_bnds, cs0_config; in fsl_ddr_set_memctl_regs() local
128 ddr_out32(&ddr->cs0_config, in fsl_ddr_set_memctl_regs()
133 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
550 ddr_out32(&ddr->cs0_config, regs->cs[0].config); in fsl_ddr_set_memctl_regs()
576 cs0_config = ddr_in32(&ddr->cs0_config); in fsl_ddr_set_memctl_regs()
581 if (cs0_config & CTLR_INTLV_MASK) { in fsl_ddr_set_memctl_regs()
621 if (cs0_config & CTLR_INTLV_MASK) { in fsl_ddr_set_memctl_regs()
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| A D | mpc85xx_ddr_gen1.c | 31 out_be32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
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| A D | mpc85xx_ddr_gen2.c | 51 out_be32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
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| A D | arm_ddr_gen3.c | 73 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
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| A D | mpc85xx_ddr_gen3.c | 105 out_be32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
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| /u-boot/board/freescale/ls1021aiot/ |
| A D | ls1021aiot.c | 60 out_be32(&ddr->cs0_config, DDR_CS0_CONFIG); in ddrmc_init()
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| /u-boot/board/freescale/ls1021atsn/ |
| A D | ls1021atsn.c | 37 out_be32(&ddr->cs0_config, DDR_CS0_CONFIG); in ddrmc_init()
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| /u-boot/include/ |
| A D | fsl_immap.h | 23 u32 cs0_config; /* Chip Select Configuration */ member
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| /u-boot/board/freescale/ls1021atwr/ |
| A D | ls1021atwr.c | 152 out_be32(&ddr->cs0_config, DDR_CS0_CONFIG); in ddrmc_init()
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