| /u-boot/include/ |
| A D | fsl_ddr.h | 31 u32 fsl_ddr_get_version(unsigned int ctrl_num);
39 compute_dimm_parameters(const unsigned int ctrl_num, in compute_dimm_parameters() argument
44 return ddr_compute_dimm_parameters(ctrl_num, spd, pdimm, dimm_number); in compute_dimm_parameters()
86 unsigned int compute_fsl_memctl_config_regs(const unsigned int ctrl_num,
94 const unsigned int ctrl_num,
101 unsigned int ctrl_num);
105 unsigned int get_memory_clk_period_ps(const unsigned int ctrl_num);
110 unsigned int ctrl_num);
117 unsigned int ctrl_num, unsigned int dimm_slots_per_ctrl);
125 unsigned int ctrl_num, int step);
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| /u-boot/drivers/ddr/fsl/ |
| A D | ctrl_regs.c | 86 const unsigned int ctrl_num) in compute_cas_write_latency() argument
120 const unsigned int ctrl_num) in compute_cas_write_latency() argument
322 unsigned int data_rate = get_ddr_freq(ctrl_num); in set_timing_cfg_0()
367 ip_rev = fsl_ddr_get_version(ctrl_num); in set_timing_cfg_0()
375 picos_to_mclk(ctrl_num, 15000)); in set_timing_cfg_0()
573 if (fsl_ddr_get_version(ctrl_num) <= 0x40400) in set_timing_cfg_1()
675 wr_lat = compute_cas_write_latency(ctrl_num); in set_timing_cfg_2()
679 rd_to_pre = picos_to_mclk(ctrl_num, 7500); in set_timing_cfg_2()
711 four_act = picos_to_mclk(ctrl_num, in set_timing_cfg_2()
922 slow = get_ddr_freq(ctrl_num) < 1249000000; in set_ddr_sdram_cfg_2()
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| A D | util.c | 30 u32 fsl_ddr_get_version(unsigned int ctrl_num) in fsl_ddr_get_version() argument
35 switch (ctrl_num) { in fsl_ddr_get_version()
55 printf("%s unexpected ctrl_num = %u\n", __func__, ctrl_num); in fsl_ddr_get_version()
72 unsigned int get_memory_clk_period_ps(const unsigned int ctrl_num) in get_memory_clk_period_ps() argument
74 unsigned int data_rate = get_ddr_freq(ctrl_num); in get_memory_clk_period_ps()
94 unsigned long data_rate = get_ddr_freq(ctrl_num); in picos_to_mclk()
120 unsigned int mclk_to_picos(const unsigned int ctrl_num, unsigned int mclk) in mclk_to_picos() argument
122 return get_memory_clk_period_ps(ctrl_num) * mclk; in mclk_to_picos()
129 unsigned int ctrl_num) in __fsl_ddr_set_lawbar() argument
148 printf("%s: ERROR (ctrl #%d, TRGT ID=%x)\n", __func__, ctrl_num, in __fsl_ddr_set_lawbar()
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| A D | options.c | 29 unsigned int ctrl_num) in fsl_ddr_board_options() argument
747 unsigned int ctrl_num) in populate_memctl_options() argument
1122 ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ? in populate_memctl_options()
1225 "interleaving disabled!\n", ctrl_num); in populate_memctl_options()
1236 "interleaving disabled!\n", ctrl_num); in populate_memctl_options()
1242 "interleaving disabled!\n", ctrl_num); in populate_memctl_options()
1251 "interleaving disabled!\n", ctrl_num); in populate_memctl_options()
1275 "interleaving disabled!\n", ctrl_num); in populate_memctl_options()
1282 "interleaving disabled!\n", ctrl_num); in populate_memctl_options()
1306 ddr_freq = get_ddr_freq(ctrl_num) / 1000000; in populate_memctl_options()
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| A D | lc_common_dimm_params.c | 16 compute_cas_latency(const unsigned int ctrl_num, in compute_cas_latency() argument
26 unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); in compute_cas_latency()
81 compute_cas_latency(const unsigned int ctrl_num, in compute_cas_latency() argument
87 const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); in compute_cas_latency()
222 compute_lowest_common_dimm_parameters(const unsigned int ctrl_num, in compute_lowest_common_dimm_parameters() argument
460 if (compute_cas_latency(ctrl_num, dimm_params, in compute_lowest_common_dimm_parameters()
537 (picos_to_mclk(ctrl_num, trcd_ps) > in compute_lowest_common_dimm_parameters()
539 additive_latency = picos_to_mclk(ctrl_num, trcd_ps) - in compute_lowest_common_dimm_parameters()
541 if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) { in compute_lowest_common_dimm_parameters()
542 additive_latency = picos_to_mclk(ctrl_num, trcd_ps); in compute_lowest_common_dimm_parameters()
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| A D | ddr1_dimm_params.c | 222 unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num, in ddr_compute_dimm_parameters() argument
305 get_memory_clk_period_ps(ctrl_num)); in ddr_compute_dimm_parameters()
312 pdimm->twr_ps = mclk_to_picos(ctrl_num, 3); in ddr_compute_dimm_parameters()
313 pdimm->twtr_ps = mclk_to_picos(ctrl_num, 1); in ddr_compute_dimm_parameters()
328 pdimm->trtp_ps = mclk_to_picos(ctrl_num, 2); /* By the book. */ in ddr_compute_dimm_parameters()
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| A D | mpc85xx_ddr_gen1.c | 17 unsigned int ctrl_num, int step) in fsl_ddr_set_memctl_regs() argument
23 if (ctrl_num != 0) { in fsl_ddr_set_memctl_regs()
24 printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num); in fsl_ddr_set_memctl_regs()
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| A D | fsl_ddr_gen4.c | 55 unsigned int ctrl_num, int step) in fsl_ddr_set_memctl_regs() argument
87 switch (ctrl_num) { in fsl_ddr_set_memctl_regs()
272 if (fsl_ddr_get_version(ctrl_num) == 0x50200) { in fsl_ddr_set_memctl_regs()
281 } else if (fsl_ddr_get_version(ctrl_num) == 0x50201) { in fsl_ddr_set_memctl_regs()
307 temp32 = get_ddr_freq(ctrl_num) / 1000000; in fsl_ddr_set_memctl_regs()
372 ctrl_num, ddr_in32(&ddr->debug[1])); in fsl_ddr_set_memctl_regs()
377 if (fsl_ddr_get_version(ctrl_num) == 0x50200) { in fsl_ddr_set_memctl_regs()
422 ctrl_num, ddr_in32(&ddr->debug[1])); in fsl_ddr_set_memctl_regs()
478 ddr_freq = get_ddr_freq(ctrl_num) / 1000000; in fsl_ddr_set_memctl_regs()
614 ctrl_num); in fsl_ddr_set_memctl_regs()
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| A D | mpc85xx_ddr_gen2.c | 17 unsigned int ctrl_num, int step) in fsl_ddr_set_memctl_regs() argument
28 if (ctrl_num) { in fsl_ddr_set_memctl_regs()
29 printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num); in fsl_ddr_set_memctl_regs()
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| /u-boot/board/freescale/ls2080aqds/ |
| A D | ddr.c | 19 unsigned int ctrl_num) in fsl_ddr_board_options() argument
28 if (ctrl_num > 2) { in fsl_ddr_board_options()
29 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
46 pbsp = rdimms[ctrl_num]; in fsl_ddr_board_options()
48 pbsp = udimms[ctrl_num]; in fsl_ddr_board_options()
54 ddr_freq = get_ddr_freq(ctrl_num) / 1000000; in fsl_ddr_board_options()
88 if (ctrl_num == CONFIG_DP_DDR_CTRL) { in fsl_ddr_board_options()
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| /u-boot/board/freescale/ls2080ardb/ |
| A D | ddr.c | 19 unsigned int ctrl_num) in fsl_ddr_board_options() argument
28 if (ctrl_num > 2) { in fsl_ddr_board_options()
29 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
46 pbsp = rdimms[ctrl_num]; in fsl_ddr_board_options()
48 pbsp = udimms[ctrl_num]; in fsl_ddr_board_options()
54 ddr_freq = get_ddr_freq(ctrl_num) / 1000000; in fsl_ddr_board_options()
88 if (ctrl_num == CONFIG_DP_DDR_CTRL) { in fsl_ddr_board_options()
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| /u-boot/board/keymile/kmcent2/ |
| A D | ddr.c | 24 unsigned int ctrl_num) in fsl_ddr_board_options() argument
26 if (ctrl_num > 1) { in fsl_ddr_board_options()
27 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/keymile/pg-wcom-ls102xa/ |
| A D | ddr.c | 19 unsigned int ctrl_num) in fsl_ddr_board_options() argument
21 if (ctrl_num > 1) { in fsl_ddr_board_options()
22 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/t4rdb/ |
| A D | ddr.c | 22 unsigned int ctrl_num) in fsl_ddr_board_options() argument
27 if (ctrl_num > 2) { in fsl_ddr_board_options()
28 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/p2041rdb/ |
| A D | ddr.c | 54 unsigned int ctrl_num) in fsl_ddr_board_options() argument
59 if (ctrl_num) { in fsl_ddr_board_options()
60 printf("Wrong parameter for controller number %d", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/t208xrdb/ |
| A D | ddr.c | 22 unsigned int ctrl_num) in fsl_ddr_board_options() argument
27 if (ctrl_num > 1) { in fsl_ddr_board_options()
28 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/ls1046aqds/ |
| A D | ddr.c | 21 unsigned int ctrl_num) in fsl_ddr_board_options() argument
26 if (ctrl_num > 3) { in fsl_ddr_board_options()
27 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/ls1046ardb/ |
| A D | ddr.c | 21 unsigned int ctrl_num) in fsl_ddr_board_options() argument
26 if (ctrl_num > 1) { in fsl_ddr_board_options()
27 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/t208xqds/ |
| A D | ddr.c | 22 unsigned int ctrl_num) in fsl_ddr_board_options() argument
27 if (ctrl_num > 1) { in fsl_ddr_board_options()
28 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/ls1088a/ |
| A D | ddr.c | 36 unsigned int ctrl_num) in fsl_ddr_board_options() argument
41 if (ctrl_num > 1) { in fsl_ddr_board_options()
42 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/t104xrdb/ |
| A D | ddr.c | 25 unsigned int ctrl_num) in fsl_ddr_board_options() argument
30 if (ctrl_num > 1) { in fsl_ddr_board_options()
31 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/ls1043aqds/ |
| A D | ddr.c | 21 unsigned int ctrl_num) in fsl_ddr_board_options() argument
26 if (ctrl_num > 3) { in fsl_ddr_board_options()
27 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/ls1021aqds/ |
| A D | ddr.c | 21 unsigned int ctrl_num) in fsl_ddr_board_options() argument
26 if (ctrl_num > 3) { in fsl_ddr_board_options()
27 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/t102xrdb/ |
| A D | ddr.c | 55 unsigned int ctrl_num) in fsl_ddr_board_options() argument
61 if (ctrl_num > 1) { in fsl_ddr_board_options()
62 printf("Not supported controller number %d\n", ctrl_num); in fsl_ddr_board_options()
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| /u-boot/board/freescale/mpc8548cds/ |
| A D | ddr.c | 13 unsigned int ctrl_num) in fsl_ddr_board_options() argument
|