| /u-boot/board/sysam/amcore/ |
| A D | amcore.c | 59 sdramctrl_t *dc = (sdramctrl_t *)(MMAP_DRAMC); in dram_init() local
84 out_be16(&dc->dcr, 0x8200 | RC); in dram_init()
89 out_be32(&dc->dacr0, 0x00003304); in dram_init()
92 out_be32(&dc->dmr0, dramsize|1); in dram_init()
95 out_be32(&dc->dacr0, 0x0000330c); in dram_init()
98 out_be32(&dc->dacr0, 0x0000b304); in dram_init()
102 out_be32(&dc->dacr0, 0x0000b344); in dram_init()
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| /u-boot/drivers/video/tegra20/ |
| A D | tegra-dc.c | 54 struct dc_ctlr *dc = priv->dc; in update_window() local
69 writel(val, &dc->win.pos); in update_window()
73 writel(val, &dc->win.size); in update_window()
79 writel(0, &dc->win.h_initial_dda); in update_window()
90 writel(0, &dc->win.buf_stride); in update_window()
99 writel(val, &dc->win.win_opt); in update_window()
110 writel(val, &dc->cmd.state_ctrl); in update_window()
305 basic_init(&priv->dc->cmd); in tegra_display_probe()
307 rgb_enable(&priv->dc->com); in tegra_display_probe()
381 if (!priv->dc) { in tegra_lcd_of_to_plat()
[all …]
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| A D | tegra-pwm-backlight.c | 37 struct dc_ctlr *dc; /* Display controller regmap */ member
49 struct dc_cmd_reg *cmd = &priv->dc->cmd; in tegra_pwm_backlight_set_brightness()
50 struct dc_com_reg *com = &priv->dc->com; in tegra_pwm_backlight_set_brightness()
111 priv->dc = (struct dc_ctlr *)TEGRA_DISPLAY_B_BASE; in tegra_pwm_backlight_probe()
113 priv->dc = (struct dc_ctlr *)TEGRA_DISPLAY_A_BASE; in tegra_pwm_backlight_probe()
115 if (!priv->dc) { in tegra_pwm_backlight_probe()
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| A D | Makefile | 3 obj-$(CONFIG_VIDEO_TEGRA20) += tegra-dc.o
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| A D | tegra-dsi.c | 51 struct dc_ctlr *dc = dc_plat->dc; in tegra_dc_enable_controller() local
54 value = readl(&dc->disp.disp_win_opt); in tegra_dc_enable_controller()
56 writel(value, &dc->disp.disp_win_opt); in tegra_dc_enable_controller()
58 writel(GENERAL_UPDATE, &dc->cmd.state_ctrl); in tegra_dc_enable_controller()
59 writel(GENERAL_ACT_REQ, &dc->cmd.state_ctrl); in tegra_dc_enable_controller()
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| /u-boot/doc/device-tree-bindings/video/ |
| A D | syncoam,seps525.txt | 4 of spi chipselect, spi max frequency, gpio to drive dc and reset pin of seps525
11 - dc-gpios: gpio connected to dc pin of seps525 controller:
23 dc-gpios = <&gpio 0x1b GPIO_ACTIVE_HIGH>;
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| A D | tegra20-dc.txt | 12 - compatible : Should be "nvidia,tegra20-dc"
53 dc@54200000 {
54 compatible = "nvidia,tegra20-dc";
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| /u-boot/drivers/spi/ |
| A D | ti_qspi.c | 84 u32 dc; member
109 u32 dc; member
219 cmd | QSPI_WR_SNGL, priv->dc); in ti_qspi_xfer()
314 priv->dc = 0; in ti_qspi_set_mode()
316 priv->dc |= QSPI_CKPHA(0); in ti_qspi_set_mode()
318 priv->dc |= QSPI_CKPOL(0); in ti_qspi_set_mode()
320 priv->dc |= QSPI_CSPOL(0); in ti_qspi_set_mode()
377 writel(priv->dc, &priv->base->dc); in ti_qspi_claim_bus()
381 priv->dc <<= slave_plat->cs * 8; in ti_qspi_claim_bus()
382 writel(priv->dc, &priv->base->dc); in ti_qspi_claim_bus()
[all …]
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| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| A D | fsl_corenet2_serdes.c | 207 u32 pll_num, pll_status, bc, dc, fc, pll_cr_upd, pll_cr0, pll_cr1; in serdes_init() local
245 dc = (sfp_spfr0 >> DC1_SHIFT) & DC_MASK; in serdes_init()
251 dc = (sfp_spfr0 >> DC2_SHIFT) & DC_MASK; in serdes_init()
257 dc = (sfp_spfr0 >> DC1_SHIFT) & DC_MASK; in serdes_init()
279 pll_cr0 | (dc << CR0_DCBIAS_SHIFT)); in serdes_init()
281 pll_num, (pll_cr0 | (dc << CR0_DCBIAS_SHIFT))); in serdes_init()
309 if (dc_status != dc) in serdes_init()
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| /u-boot/arch/arm/dts/ |
| A D | tegra20-u-boot.dtsi | 9 dc@54200000 {
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| A D | tegra30-u-boot.dtsi | 8 dc@54200000 {
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| A D | tegra124-nyan-big-u-boot.dtsi | 12 dc@54200000 {
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| A D | tegra114.dtsi | 44 dc@54200000 {
45 compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
50 clock-names = "dc", "parent";
52 reset-names = "dc";
63 dc@54240000 {
64 compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
69 clock-names = "dc", "parent";
71 reset-names = "dc";
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| A D | tegra20-medcom-wide.dts | 25 dc@54200000 {
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| A D | tegra20-tec.dts | 25 dc@54200000 {
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| A D | tegra20.dtsi | 79 dc@54200000 {
80 compatible = "nvidia,tegra20-dc";
85 clock-names = "dc", "parent";
87 reset-names = "dc";
96 dc@54240000 {
97 compatible = "nvidia,tegra20-dc";
102 clock-names = "dc", "parent";
104 reset-names = "dc";
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| A D | tegra30.dtsi | 160 dc@54200000 {
161 compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
166 clock-names = "dc", "parent";
168 reset-names = "dc";
179 dc@54240000 {
180 compatible = "nvidia,tegra30-dc";
185 clock-names = "dc", "parent";
187 reset-names = "dc";
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| A D | tegra210.dtsi | 119 dc@54200000 {
120 compatible = "nvidia,tegra210-dc";
125 clock-names = "dc", "parent";
127 reset-names = "dc";
134 dc@54240000 {
135 compatible = "nvidia,tegra210-dc";
140 clock-names = "dc", "parent";
142 reset-names = "dc";
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| A D | tegra124.dtsi | 97 dc@54200000 {
98 compatible = "nvidia,tegra124-dc";
103 clock-names = "dc", "parent";
105 reset-names = "dc";
112 dc@54240000 {
113 compatible = "nvidia,tegra124-dc";
118 clock-names = "dc", "parent";
120 reset-names = "dc";
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| A D | rk3368-lion-haikou.dts | 41 dc_12v: dc-12v {
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| /u-boot/arch/arm/cpu/armv8/ |
| A D | cache.S | 50 dc isw, x9
52 1: dc cisw, x9 /* clean & invalidate by set/way */
173 1: dc civac, x0 /* clean & invalidate data or unified cache */
199 1: dc ivac, x0 /* invalidate data or unified cache */
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| /u-boot/doc/device-tree-bindings/gpu/ |
| A D | nvidia,tegra20-host1x.txt | 105 - dc: display controller
114 - dc
120 - dc
309 dc@54200000 {
310 compatible = "nvidia,tegra20-dc";
315 clock-names = "dc", "parent";
317 reset-names = "dc";
324 dc@54240000 {
325 compatible = "nvidia,tegra20-dc";
330 clock-names = "dc", "parent";
[all …]
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| /u-boot/doc/device-tree-bindings/exynos/ |
| A D | tmu.txt | 25 - samsung,dc-value : Measured data calibration value (Constant 25)
43 samsung,dc-value = <25>;
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| /u-boot/arch/riscv/dts/ |
| A D | k210-maix-bit.dts | 148 <K210_FPIOA(38, K210_PCF_GPIOHS22)>, /* dc */
175 dc-gpios = <&gpio0 22 0>;
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| /u-boot/board/hisilicon/hikey/ |
| A D | build-tf.mak | 4 makethreads := $(shell dc -e "$(makejobs) 1 + p")
|