Home
last modified time | relevance | path

Searched refs:ddr3 (Results 1 – 25 of 40) sorted by relevance

12

/u-boot/board/siemens/draco/
A Dboard.c80 settings.ddr3 = ddr3_default; in set_default_ddr3_timings()
87 printf("device:\t\t%s\n", settings.ddr3.manu_name); in print_ddr3_timings()
88 printf("marking:\t%s\n", settings.ddr3.manu_marking); in print_ddr3_timings()
184 if (ddr3_default.magic == settings.ddr3.magic && in read_eeprom()
185 ddr3_default.version == settings.ddr3.version) { in read_eeprom()
188 if (ddr3_default.magic != settings.ddr3.magic) in read_eeprom()
190 if (ddr3_default.version != settings.ddr3.version) in read_eeprom()
230 settings.ddr3.emif_ddr_phy_ctlr_1; in board_init_ddr()
247 draco_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val, in board_init_ddr()
248 draco_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val, in board_init_ddr()
[all …]
A Dboard.h19 settings.ddr3.x, /* EEPROM Value */ \
21 settings.ddr3.x-ddr3_default.x /* Difference */
57 struct ddr3_data ddr3; member
/u-boot/board/bsh/imx8mn_smm_s2/
A DKconfig16 default "board/bsh/imx8mn_smm_s2/imximage-8mn-ddr3.cfg"
36 default "board/bsh/imx8mn_smm_s2/imximage-8mn-ddr3.cfg"
/u-boot/arch/arm/dts/
A Drk3399-puma-haikou-u-boot.dtsi6 #include "rk3399-sdram-ddr3-1333.dtsi"
9 #include "rk3399-sdram-ddr3-1600.dtsi"
12 #include "rk3399-sdram-ddr3-1866.dtsi"
A Dstm32mp15xx-dhcor-u-boot.dtsi12 #include "stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi"
13 #include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi"
14 #include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi"
24 dh,ddr3-coding-gpios = <&gpiog 0 0>, <&gpiog 1 0>;
A Drk3399-nanopi-m4b-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1866.dtsi"
A Drk3399-nanopi-neo4-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1866.dtsi"
A Drk3399-orangepi-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1333.dtsi"
A Drk3399-nanopi-m4-2gb-u-boot.dtsi8 #include "rk3399-sdram-ddr3-1866.dtsi"
A Drk3399-ficus-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1600.dtsi"
A Drk3399-firefly-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1600.dtsi"
A Dstm32mp15xx-dhcom-u-boot.dtsi8 #include "stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi"
9 #include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi"
10 #include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi"
28 dh,ddr3-coding-gpios = <&gpioz 6 0>, <&gpioz 7 0>;
A Drk3328-rock-pi-e-u-boot.dtsi7 #include "rk3328-sdram-ddr3-666.dtsi"
A Drk3328-evb-u-boot.dtsi7 #include "rk3328-sdram-ddr3-666.dtsi"
A Dstm32mp157a-microgea-stm32mp1-u-boot.dtsi10 #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
A Dstm32mp157a-icore-stm32mp1-u-boot.dtsi10 #include "stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi"
A Dstm32mp157c-odyssey-som-u-boot.dtsi8 #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
A Dstm32mp157a-dk1-u-boot.dtsi8 #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
/u-boot/drivers/ram/mediatek/
A DMakefile7 obj-$(CONFIG_TARGET_MT7629) = ddr3-mt7629.o
/u-boot/cmd/ti/
A DMakefile7 obj-$(CONFIG_CMD_DDR3) += ddr3.o
A DKconfig6 Support for testing ddr3 on TI platforms. This command
/u-boot/arch/arm/mach-keystone/
A DMakefile19 obj-y += ddr3.o
/u-boot/board/hisilicon/hikey/
A DREADME124 INFO: ddr3 rank1 init pass
126 INFO: ddr3 rank1 init pass
128 INFO: ddr3 rank1 init pass
130 INFO: ddr3 rank1 init pass
132 INFO: ddr3 rank1 init pass
/u-boot/drivers/ram/rockchip/
A Dsdram-rv1126-loader_params.inc17 /* ddr3 */
124 /* ddr4 map << 0 | ddr3 map << 24 */
/u-boot/doc/board/bsh/
A Dimx8mn_bsh_smm_s2.rst36 $ cp firmware-imx-8.9/firmware/ddr/synopsys/ddr3*.bin $(srctree)

Completed in 31 milliseconds

12