Searched refs:ddr3_tip_read_adll_value (Results 1 – 4 of 4) sorted by relevance
| /u-boot/drivers/ddr/marvell/a38x/ |
| A D | ddr3_debug.c | 792 int ddr3_tip_read_adll_value(u32 dev_num, u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM], in ddr3_tip_read_adll_value() function
1110 ddr3_tip_read_adll_value(dev_num, ctrl_adll, in ddr3_tip_run_sweep_test()
1199 ddr3_tip_read_adll_value(dev_num, ctrl_adll, reg, MASK_ALL_BITS); in ddr3_tip_run_sweep_test()
1252 ddr3_tip_read_adll_value(dev_num, ctrl_adll, reg, 0x1f); in ddr3_tip_run_leveling_sweep_test()
1256 ddr3_tip_read_adll_value(dev_num, ctrl_adll1, in ddr3_tip_run_leveling_sweep_test()
1393 ddr3_tip_read_adll_value(dev_num, ctrl_adll, reg, MASK_ALL_BITS); in ddr3_tip_run_leveling_sweep_test()
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| A D | ddr3_training_ip_flow.h | 121 int ddr3_tip_read_adll_value(u32 dev_num,
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| A D | ddr3_training_bist.c | 507 ddr3_tip_read_adll_value(0, wr_ctrl_adll, CTX_PHY_REG(cs), MASK_ALL_BITS); in mv_ddr_dm_vw_get()
508 ddr3_tip_read_adll_value(0, rd_ctrl_adll, CRX_PHY_REG(cs), MASK_ALL_BITS); in mv_ddr_dm_vw_get()
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| A D | ddr3_training_pbs.c | 75 ddr3_tip_read_adll_value(dev_num, nominal_adll, reg_addr, MASK_ALL_BITS); in ddr3_tip_pbs()
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