| /u-boot/board/gateworks/venice/ |
| A D | lpddr4_timing_imx8mn.c | 413 static struct dram_cfg_param ddr_phy_pie[] = { variable
1437 .ddrphy_pie = ddr_phy_pie,
1438 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
1902 .ddrphy_pie = ddr_phy_pie,
1903 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
2366 .ddrphy_pie = ddr_phy_pie,
2367 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing_imx8mm_512mb.c | 1210 static struct dram_cfg_param ddr_phy_pie[] = { variable
1846 .ddrphy_pie = ddr_phy_pie,
1847 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing_imx8mp.c | 733 static struct dram_cfg_param ddr_phy_pie[] = { variable
1843 .ddrphy_pie = ddr_phy_pie,
1844 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/freescale/imx93_evk/ |
| A D | lpddr4x_timing_ld.c | 926 struct dram_cfg_param ddr_phy_pie[] = { variable
1493 .ddrphy_pie = ddr_phy_pie,
1494 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/bsh/imx8mn_smm_s2/ |
| A D | ddr3l_timing_256m.c | 713 struct dram_cfg_param ddr_phy_pie[] = { variable
938 .ddrphy_pie = ddr_phy_pie,
939 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | ddr3l_timing_512m.c | 713 struct dram_cfg_param ddr_phy_pie[] = { variable
938 .ddrphy_pie = ddr_phy_pie,
939 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/variscite/imx8mn_var_som/ |
| A D | ddr4_timing.c | 295 static struct dram_cfg_param ddr_phy_pie[] = { variable
525 .ddrphy_pie = ddr_phy_pie,
526 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/google/imx8mq_phanbell/ |
| A D | lpddr4_timing_1g.c | 1111 static struct dram_cfg_param ddr_phy_pie[] = { variable
1728 .ddrphy_pie = ddr_phy_pie,
1729 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/kontron/sl-mx8mm/ |
| A D | lpddr4_timing.c | 1095 struct dram_cfg_param ddr_phy_pie[] = { variable
1712 .ddrphy_pie = ddr_phy_pie,
1713 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/freescale/imx8mn_evk/ |
| A D | ddr4_timing.c | 819 struct dram_cfg_param ddr_phy_pie[] = { variable
1051 .ddrphy_pie = ddr_phy_pie,
1052 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | ddr4_timing_ld.c | 821 struct dram_cfg_param ddr_phy_pie[] = { variable
1053 .ddrphy_pie = ddr_phy_pie,
1054 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing.c | 982 struct dram_cfg_param ddr_phy_pie[] = { variable
1584 .ddrphy_pie = ddr_phy_pie,
1585 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/technexion/pico-imx8mq/ |
| A D | lpddr4_timing_1gb.c | 1113 static struct dram_cfg_param ddr_phy_pie[] = { variable
1730 .ddrphy_pie = ddr_phy_pie,
1731 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
|
| A D | lpddr4_timing_2gb.c | 1113 static struct dram_cfg_param ddr_phy_pie[] = { variable
1730 .ddrphy_pie = ddr_phy_pie,
1731 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing_3gb.c | 1113 static struct dram_cfg_param ddr_phy_pie[] = { variable
1730 .ddrphy_pie = ddr_phy_pie,
1731 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing_4gb.c | 1113 static struct dram_cfg_param ddr_phy_pie[] = { variable
1730 .ddrphy_pie = ddr_phy_pie,
1731 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/phytec/phycore_imx8mm/ |
| A D | lpddr4_timing.c | 1207 static struct dram_cfg_param ddr_phy_pie[] = { variable
1843 .ddrphy_pie = ddr_phy_pie,
1844 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/compulab/imx8mm-cl-iot-gate/ddr/ |
| A D | lpddr4_timing_01061010.1_2.c | 1208 static struct dram_cfg_param ddr_phy_pie[] = { variable
1844 .ddrphy_pie = ddr_phy_pie,
1845 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing_01061010.c | 1208 static struct dram_cfg_param ddr_phy_pie[] = { variable
1844 .ddrphy_pie = ddr_phy_pie,
1845 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing_ff000110.c | 1208 static struct dram_cfg_param ddr_phy_pie[] = { variable
1844 .ddrphy_pie = ddr_phy_pie,
1845 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing_ff020008.c | 1208 static struct dram_cfg_param ddr_phy_pie[] = { variable
1844 .ddrphy_pie = ddr_phy_pie,
1845 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/data_modul/imx8mm_edm_sbc/ |
| A D | lpddr4_timing_2G_32.c | 1207 static struct dram_cfg_param ddr_phy_pie[] = { variable
1843 .ddrphy_pie = ddr_phy_pie,
1844 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| A D | lpddr4_timing_4G_32.c | 1207 static struct dram_cfg_param ddr_phy_pie[] = { variable
1843 .ddrphy_pie = ddr_phy_pie,
1844 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/data_modul/imx8mp_edm_sbc/ |
| A D | lpddr4_timing_4G_32.c | 1221 static struct dram_cfg_param ddr_phy_pie[] = { variable
1846 .ddrphy_pie = ddr_phy_pie,
1847 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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| /u-boot/board/freescale/imx8mm_evk/ |
| A D | lpddr4_timing.c | 1209 struct dram_cfg_param ddr_phy_pie[] = { variable
1845 .ddrphy_pie = ddr_phy_pie,
1846 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
|