Home
last modified time | relevance | path

Searched refs:dev_err (Results 1 – 25 of 337) sorted by relevance

12345678910>>...14

/u-boot/drivers/pci/
A Dpcie_rockchip.c251 dev_err(dev, "failed to init phy (ret=%d)\n", ret); in rockchip_pcie_init_port()
308 dev_err(dev, "failed to power on phy (ret=%d)\n", ret); in rockchip_pcie_init_port()
348 dev_err(dev, "PCIe link training gen1 timeout!\n"); in rockchip_pcie_init_port()
368 dev_err(dev, "PCIE-%d: ATR init failed\n", dev_seq(dev)); in rockchip_pcie_init_port()
389 dev_err(dev, "failed to enable vpcie3v3 (ret=%d)\n", in rockchip_pcie_set_vpcie()
398 dev_err(dev, "failed to enable vpcie1v8 (ret=%d)\n", in rockchip_pcie_set_vpcie()
407 dev_err(dev, "failed to enable vpcie0v9 (ret=%d)\n", in rockchip_pcie_set_vpcie()
440 dev_err(dev, "failed to find ep-gpios property\n"); in rockchip_pcie_parse_dt()
446 dev_err(dev, "failed to get core reset (ret=%d)\n", ret); in rockchip_pcie_parse_dt()
470 dev_err(dev, "failed to get pm reset (ret=%d)\n", ret); in rockchip_pcie_parse_dt()
[all …]
A Dpcie_dw_meson.c267 dev_err(dev, "failed to init phy (ret=%d)\n", ret); in meson_pcie_init_port()
273 dev_err(dev, "failed to power on phy (ret=%d)\n", ret); in meson_pcie_init_port()
279 dev_err(dev, "failed to reset phy (ret=%d)\n", ret); in meson_pcie_init_port()
285 dev_err(dev, "failed to assert resets (ret=%d)\n", ret); in meson_pcie_init_port()
313 dev_err(dev, "failed to enable pclk (ret=%d)\n", ret); in meson_pcie_init_port()
355 dev_err(dev, "failed to find reset-gpios property\n"); in meson_pcie_parse_dt()
361 dev_err(dev, "Can't get reset: %d\n", ret); in meson_pcie_parse_dt()
367 dev_err(dev, "Can't get port clock: %d\n", ret); in meson_pcie_parse_dt()
373 dev_err(dev, "Can't get port clock: %d\n", ret); in meson_pcie_parse_dt()
379 dev_err(dev, "Can't get port clock: %d\n", ret); in meson_pcie_parse_dt()
[all …]
A Dpcie_dw_rockchip.c113 dev_err(rk_pcie->dw.dev, "Read APB address failed\n"); in __rk_pcie_read_apb()
125 dev_err(rk_pcie->dw.dev, "Write APB address failed\n"); in __rk_pcie_write_apb()
294 dev_err(priv->dw.dev, "failed to enable vpcie3v3 (ret=%d)\n", in rockchip_pcie_init_port()
304 dev_err(dev, "failed to init phy (ret=%d)\n", ret); in rockchip_pcie_init_port()
310 dev_err(dev, "failed to power on phy (ret=%d)\n", ret); in rockchip_pcie_init_port()
316 dev_err(dev, "failed to deassert resets (ret=%d)\n", ret); in rockchip_pcie_init_port()
322 dev_err(dev, "failed to enable clks (ret=%d)\n", ret); in rockchip_pcie_init_port()
372 dev_err(dev, "failed to find reset-gpios property\n"); in rockchip_pcie_parse_dt()
378 dev_err(dev, "Can't get reset: %d\n", ret); in rockchip_pcie_parse_dt()
384 dev_err(dev, "Can't get clock: %d\n", ret); in rockchip_pcie_parse_dt()
[all …]
/u-boot/drivers/remoteproc/
A Dstm32_copro.c44 dev_err(dev, "failed to get reset (%d)\n", ret); in stm32_copro_probe()
50 dev_err(dev, "failed to get hold boot (%d)\n", ret); in stm32_copro_probe()
74 dev_err(dev, "Unable to convert address %ld\n", da); in stm32_copro_device_to_virt()
80 dev_err(dev, "Unable to convert address %ld\n", da + size - 1); in stm32_copro_device_to_virt()
104 dev_err(dev, "Unable to assert hold boot (ret=%d)\n", ret); in stm32_copro_load()
110 dev_err(dev, "Unable to assert reset line (ret=%d)\n", ret); in stm32_copro_load()
137 dev_err(dev, "Unable to deassert hold boot (ret=%d)\n", ret); in stm32_copro_start()
147 dev_err(dev, "Unable to assert hold boot (ret=%d)\n", ret); in stm32_copro_start()
171 dev_err(dev, "Unable to assert hold boot (ret=%d)\n", ret); in stm32_copro_reset()
177 dev_err(dev, "Unable to assert reset line (ret=%d)\n", ret); in stm32_copro_reset()
A Dti_k3_arm64_rproc.c72 dev_err(dev, "power_domain_on(&rproc->gtc_pwrdmn) failed: %d\n", in k3_arm64_load()
93 dev_err(dev, in k3_arm64_load()
117 dev_err(dev, in k3_arm64_start()
154 dev_err(dev, "ti_sci get failed: %ld\n", PTR_ERR(tsp->sci)); in ti_sci_proc_of_to_priv()
160 dev_err(dev, "proc id not populated\n"); in ti_sci_proc_of_to_priv()
193 dev_err(dev, "power_domain_get_rproc() failed: %d\n", ret); in k3_arm64_of_to_priv()
199 dev_err(dev, "power_domain_get() failed: %d\n", ret); in k3_arm64_of_to_priv()
205 dev_err(dev, "clk_get failed: %d\n", ret); in k3_arm64_of_to_priv()
211 dev_err(dev, "reset_get() failed: %d\n", ret); in k3_arm64_of_to_priv()
221 dev_err(dev, "Get address failed\n"); in k3_arm64_of_to_priv()
A Dk3_system_controller.c115 dev_err(dev, "%s: Command expected 0x%x, but received 0x%x\n", in k3_sysctrler_load_response()
122 dev_err(dev, "%s: Firmware certificate authentication failed\n", in k3_sysctrler_load_response()
126 dev_err(dev, "%s: Firmware Load response Invalid %d\n", in k3_sysctrler_load_response()
147 dev_err(dev, "%s: Command expected 0x%x, but received 0x%x\n", in k3_sysctrler_boot_notification_response()
187 dev_err(dev, "%s: Firmware Loading failed. ret = %d\n", in k3_sysctrler_load()
195 dev_err(dev, "%s: Firmware Load response failed. ret = %d\n", in k3_sysctrler_load()
233 dev_err(dev, "%s: Boot Notification response failed. ret = %d\n", in k3_sysctrler_start()
268 dev_err(dev, "%s: Acquiring Tx channel failed. ret = %d\n", in k3_of_to_priv()
275 dev_err(dev, "%s: Acquiring Rx channel failed. ret = %d\n", in k3_of_to_priv()
288 dev_err(dev, "%s: Acquiring boot_notify channel failed. ret = %d\n", in k3_of_to_priv()
[all …]
A Dti_k3_r5f_rproc.c249 dev_err(core->dev, in k3_r5f_core_sanity_check()
256 dev_err(core->dev, in k3_r5f_core_sanity_check()
262 dev_err(core->dev, in k3_r5f_core_sanity_check()
270 dev_err(core->dev, in k3_r5f_core_sanity_check()
325 dev_err(dev, "R5f prepare failed for core %d\n", in k3_r5f_load()
334 dev_err(dev, "Loading elf failedi %d\n", ret); in k3_r5f_load()
357 dev_err(core->dev, "Core %d failed to stop\n", in k3_r5f_core_halt()
370 dev_err(core->dev, "Core %d failed to start\n", in k3_r5f_core_run()
658 dev_err(dev, "Proc IDs not populated %d\n", ret); in ti_sci_proc_of_to_priv()
718 dev_err(dev, "%s bus address not found\n", in k3_r5f_core_of_get_memories()
[all …]
/u-boot/drivers/adc/
A Dstm32-adc-core.c71 dev_err(dev, "No bclk clock found\n"); in stm32h7_adc_clk_sel()
87 dev_err(dev, "Invalid aclk rate: 0\n"); in stm32h7_adc_clk_sel()
107 dev_err(dev, "Invalid bus clock rate: 0\n"); in stm32h7_adc_clk_sel()
123 dev_err(dev, "clk selection failed\n"); in stm32h7_adc_clk_sel()
149 dev_err(dev, "can't get address\n"); in stm32_adc_core_probe()
155 dev_err(dev, "can't get vref-supply: %d\n", ret); in stm32_adc_core_probe()
161 dev_err(dev, "can't get vref-supply value: %d\n", ret); in stm32_adc_core_probe()
170 dev_err(dev, "Can't enable aclk: %d\n", ret); in stm32_adc_core_probe()
179 dev_err(dev, "Can't enable bclk: %d\n", ret); in stm32_adc_core_probe()
A Dstm32-adc.c109 dev_err(dev, "Failed to enable vreg: %d\n", ret); in stm32_adc_exit_pwr_down()
146 dev_err(dev, "Failed to enable ADC: %d\n", ret); in stm32_adc_start_channel()
176 dev_err(dev, "Requested channel is not active!\n"); in stm32_adc_channel_data()
184 dev_err(dev, "conversion timed out: %d\n", ret); in stm32_adc_channel_data()
225 dev_err(dev, "calibration failed\n"); in stm32_adc_selfcalib()
243 dev_err(dev, "calibration failed\n"); in stm32_adc_selfcalib()
280 dev_err(dev, "bad channel %u\n", chans[i]); in stm32_adc_legacy_chan_init()
299 dev_err(dev, "Missing channel index %d\n", ret); in stm32_adc_generic_chan_init()
304 dev_err(dev, "Invalid channel %d\n", val); in stm32_adc_generic_chan_init()
329 dev_err(dev, "No channel found\n"); in stm32_adc_chan_of_init()
[all …]
/u-boot/drivers/usb/host/
A Dehci-generic.c45 dev_err(dev, "Error enabling VBUS supply (ret=%d)\n", ret); in ehci_enable_vbus_supply()
73 dev_err(dev, "Failed to get clocks (ret=%d)\n", ret); in ehci_usb_probe()
79 dev_err(dev, "Failed to enable clocks (err=%d)\n", err); in ehci_usb_probe()
85 dev_err(dev, "Failed to get resets (err=%d)\n", err); in ehci_usb_probe()
91 dev_err(dev, "Failed to get deassert resets (err=%d)\n", err); in ehci_usb_probe()
116 dev_err(dev, "failed to shutdown usb phy (ret=%d)\n", ret); in ehci_usb_probe()
121 dev_err(dev, "failed to disable VBUS supply (ret=%d)\n", ret); in ehci_usb_probe()
126 dev_err(dev, "failed to release resets (ret=%d)\n", ret); in ehci_usb_probe()
130 dev_err(dev, "failed to release clocks (ret=%d)\n", ret); in ehci_usb_probe()
A Dohci-generic.c49 dev_err(dev, "failed to enable clock %d\n", i); in ohci_usb_probe()
56 dev_err(dev, "failed to get clock phandle(%d)\n", clock_nb); in ohci_usb_probe()
77 dev_err(dev, "failed to deassert reset %d\n", i); in ohci_usb_probe()
84 dev_err(dev, "failed to get reset phandle(%d)\n", reset_nb); in ohci_usb_probe()
101 dev_err(dev, "failed to shutdown usb phy\n"); in ohci_usb_probe()
106 dev_err(dev, "failed to assert all resets\n"); in ohci_usb_probe()
110 dev_err(dev, "failed to disable all clocks\n"); in ohci_usb_probe()
/u-boot/drivers/phy/ti/
A Dphy-j721e-wiz.c757 dev_err(dev, "WIZ reset failed\n"); in wiz_init()
763 dev_err(dev, "WIZ mode select failed\n"); in wiz_init()
792 dev_err(dev, "POR_EN reg field init failed\n"); in wiz_regfield_init()
929 dev_err(dev, "core_ref_clk clock not found\n"); in wiz_clock_init()
962 dev_err(dev, "ext_ref_clk clock not found\n"); in wiz_clock_init()
1005 dev_err(dev, "Cannot find driver 'wiz_clk'\n"); in j721e_wiz_bind_clocks()
1211 dev_err(dev, "Failed to get lane PHY types\n"); in j721e_wiz_probe()
1224 dev_err(dev, "SERDES already configured\n"); in j721e_wiz_probe()
1232 dev_err(dev, "Failed to bind clocks\n"); in j721e_wiz_probe()
1238 dev_err(dev, "Failed to bind reset\n"); in j721e_wiz_probe()
[all …]
/u-boot/drivers/net/
A Ddwmac_socfpga.c39 dev_err(dev, "Failed to get syscon: %d\n", ret); in dwmac_socfpga_of_to_plat()
44 dev_err(dev, "Invalid number of syscon args\n"); in dwmac_socfpga_of_to_plat()
51 dev_err(dev, "Failed to get regmap: %d\n", ret); in dwmac_socfpga_of_to_plat()
57 dev_err(dev, "Failed to get regmap range\n"); in dwmac_socfpga_of_to_plat()
82 dev_err(dev, "Failed to set PHY register via SMC call\n"); in dwmac_socfpga_do_setphy()
113 dev_err(dev, "Unsupported PHY mode\n"); in dwmac_socfpga_probe()
119 dev_err(dev, "Failed to get reset: %d\n", ret); in dwmac_socfpga_probe()
/u-boot/drivers/gpio/
A Dmcp230xx_gpio.c63 dev_err(dev, "%s error: %d\n", __func__, ret); in mcp230xx_get_value()
76 dev_err(dev, "%s error: %d\n", __func__, ret); in mcp230xx_set_value()
90 dev_err(dev, "%s error: %d\n", __func__, pullup); in mcp230xx_get_flags()
96 dev_err(dev, "%s error: %d\n", __func__, direction); in mcp230xx_get_flags()
118 dev_err(dev, "%s unsupported flag(s): %lx\n", __func__, flags); in mcp230xx_set_flags()
124 dev_err(dev, "%s failed to setup output latch: %d\n", __func__, ret); in mcp230xx_set_flags()
130 dev_err(dev, "%s failed to setup pull-up: %d\n", __func__, ret); in mcp230xx_set_flags()
136 dev_err(dev, "%s failed to setup direction: %d\n", __func__, ret); in mcp230xx_set_flags()
152 dev_err(dev, "%s error: %d\n", __func__, ret); in mcp230xx_direction_output()
164 dev_err(dev, "%s error: %d\n", __func__, ret); in mcp230xx_get_function()
/u-boot/drivers/misc/
A Desm_pmic.c43 dev_err(dev, "clearing ESM irqs failed: %d\n", ret); in pmic_esm_probe()
50 dev_err(dev, "setting ESM mode failed: %d\n", ret); in pmic_esm_probe()
56 dev_err(dev, "clearing ESM masks failed: %d\n", ret); in pmic_esm_probe()
62 dev_err(dev, "starting ESM failed: %d\n", ret); in pmic_esm_probe()
/u-boot/drivers/phy/
A Dmt7620-usb-phy.c37 dev_err(_phy->dev, in mt7620_usb_phy_power_on()
67 dev_err(dev, "mt7620_usbphy: sysc property not found\n"); in mt7620_usb_phy_probe()
74 dev_err(dev, "mt7620_usbphy: failed to sysc device\n"); in mt7620_usb_phy_probe()
80 dev_err(dev, "mt7620_usbphy: failed to get clocks\n"); in mt7620_usb_phy_probe()
86 dev_err(dev, "mt7620_usbphy: failed to get reset control\n"); in mt7620_usb_phy_probe()
/u-boot/drivers/bootcount/
A Dbootcount_syscon.c82 dev_err(dev, "%s: Invalid bootcount magic\n", __func__); in bootcount_syscon_get()
99 dev_err(dev, "%s: Unable to find regmap (%ld)\n", __func__, in bootcount_syscon_of_to_plat()
106 dev_err(dev, "%s: syscon_reg address not found\n", __func__); in bootcount_syscon_of_to_plat()
110 dev_err(dev, "%s: Unsupported register size: %pa\n", __func__, in bootcount_syscon_of_to_plat()
117 dev_err(dev, "%s: offset configuration not found\n", __func__); in bootcount_syscon_of_to_plat()
121 dev_err(dev, in bootcount_syscon_of_to_plat()
127 dev_err(dev, in bootcount_syscon_of_to_plat()
/u-boot/drivers/ufs/
A Dufs.c178 dev_err(hba->dev, in ufshcd_send_uic_cmd()
201 dev_err(hba->dev, in ufshcd_send_uic_cmd()
442 dev_err(hba->dev, in ufshcd_make_hba_operational()
1011 dev_err(hba->dev, in ufshcd_query_flag()
1021 dev_err(hba->dev, in ufshcd_query_flag()
1053 dev_err(hba->dev, in ufshcd_query_flag_retry()
1346 dev_err(hba->dev, in ufshcd_uic_pwr_ctrl()
1733 dev_err(hba->dev, in ufshcd_change_power_mode()
1781 dev_err(hba->dev, in ufshcd_complete_dev_init()
1794 dev_err(hba->dev, in ufshcd_complete_dev_init()
[all …]
/u-boot/drivers/phy/rockchip/
A Dphy-rockchip-pcie.c102 dev_err(phy->dev, "failed to assert phy reset\n"); in rockchip_pcie_phy_power_on()
123 dev_err(phy->dev, "pll lock timeout!\n"); in rockchip_pcie_phy_power_on()
137 dev_err(phy->dev, "pll output enable timeout!\n"); in rockchip_pcie_phy_power_on()
153 dev_err(phy->dev, "pll relock timeout!\n"); in rockchip_pcie_phy_power_on()
177 dev_err(phy->dev, "failed to assert phy reset\n"); in rockchip_pcie_phy_power_off()
191 dev_err(phy->dev, "failed to enable refclk clock\n"); in rockchip_pcie_phy_init()
197 dev_err(phy->dev, "failed to assert phy reset\n"); in rockchip_pcie_phy_init()
238 dev_err(dev, "failed to get refclk clock phandle\n"); in rockchip_pcie_phy_probe()
244 dev_err(dev, "failed to get phy reset phandle\n"); in rockchip_pcie_phy_probe()
/u-boot/drivers/net/ti/
A Dam65-cpsw-nuss.c280 dev_err(common->dev, in am65_cpsw_gmii_sel_k3()
311 dev_err(dev, "TX dma get failed %d\n", ret); in am65_cpsw_start()
316 dev_err(dev, "RX dma get failed %d\n", ret); in am65_cpsw_start()
391 dev_err(dev, "mac_sl reset failed\n"); in am65_cpsw_start()
398 dev_err(dev, "phy_startup failed\n"); in am65_cpsw_start()
419 dev_err(dev, "mac_sl idle timeout\n"); in am65_cpsw_start()
436 dev_err(dev, "%s end error\n", __func__); in am65_cpsw_start()
502 dev_err(dev, "mac_sl idle timeout\n"); in am65_cpsw_stop()
595 dev_err(dev, "phy_connect() failed\n"); in am65_cpsw_phy_init()
754 dev_err(dev, "%s: invalid port_id (%d)\n", in am65_cpsw_probe_nuss()
[all …]
/u-boot/drivers/reboot-mode/
A Dreboot-mode-uclass.c26 dev_err(dev, "Failed to retrieve the reboot mode value\n"); in dm_reboot_mode_update()
38 dev_err(dev, "Failed to set env: %s\n", in dm_reboot_mode_update()
50 dev_err(dev, "Failed to clear the reboot mode\n"); in dm_reboot_mode_update()
82 dev_err(dev, "Could not get the value for property %s\n", in dm_reboot_mode_pre_probe()
99 dev_err(dev, "Could not get the value for property %s\n", in dm_reboot_mode_pre_probe()
/u-boot/drivers/clk/ti/
A Dclk-sci.c79 dev_err(clk->dev, "%s: get_freq failed (%d)\n", __func__, ret); in ti_sci_clk_get_rate()
103 dev_err(clk->dev, "%s: set_freq failed (%d)\n", __func__, ret); in ti_sci_clk_set_rate()
128 dev_err(clk->dev, "%s: get_num_parents failed (%d)\n", in ti_sci_clk_set_parent()
133 dev_err(clk->dev, "%s: clock has no settable parents!\n", in ti_sci_clk_set_parent()
141 dev_err(clk->dev, "%s: invalid parent clock!\n", __func__); in ti_sci_clk_set_parent()
148 dev_err(clk->dev, "%s: set_parent failed (%d)\n", __func__, in ti_sci_clk_set_parent()
169 dev_err(clk->dev, "%s: put_clock failed (%d)\n", __func__, ret); in ti_sci_clk_enable()
186 dev_err(clk->dev, "%s: idle_clock failed (%d)\n", __func__, in ti_sci_clk_disable()
/u-boot/drivers/video/ti/
A Dtilcdc.c143 dev_err(dev, "failed to find a divisor\n"); in tilcdc_set_pixel_clk_rate()
187 dev_err(dev, "failed to get panel\n"); in tilcdc_probe()
193 dev_err(dev, "failed to get display timing\n"); in tilcdc_probe()
211 dev_err(dev, "failed to get panel info\n"); in tilcdc_probe()
221 dev_err(dev, "invalid seting, bpp: %d\n", info.bpp); in tilcdc_probe()
233 dev_err(dev, "invalid setting, dma-burst-sz: %d\n", in tilcdc_probe()
240 dev_err(dev, "failed to get lcd_gclk device\n"); in tilcdc_probe()
252 dev_err(dev, "failed to set pixel clock rate\n"); in tilcdc_probe()
271 dev_err(dev, "failed to set %s clock as %s's parent\n", in tilcdc_probe()
379 dev_err(dev, "failed to enable panel backlight\n"); in tilcdc_probe()
[all …]
/u-boot/common/
A Dusb_onboard_hub.c26 dev_err(dev, "can't get vdd-supply: %d\n", ret); in usb_onboard_hub_probe()
32 dev_err(dev, "can't enable vdd-supply: %d\n", ret); in usb_onboard_hub_probe()
44 dev_err(dev, "can't disable vdd-supply: %d\n", ret); in usb_onboard_hub_remove()
/u-boot/drivers/smem/
A Dmsm_smem.c358 dev_err(smem->dev, in qcom_smem_alloc_private()
445 dev_err(__smem->dev, in qcom_smem_alloc()
642 dev_err(smem->dev, in qcom_smem_get_ptable()
722 dev_err(smem->dev, in qcom_smem_set_global_partition()
767 dev_err(smem->dev, in qcom_smem_enumerate_partitions()
774 dev_err(smem->dev, in qcom_smem_enumerate_partitions()
786 dev_err(smem->dev, in qcom_smem_enumerate_partitions()
792 dev_err(smem->dev, in qcom_smem_enumerate_partitions()
798 dev_err(smem->dev, in qcom_smem_enumerate_partitions()
804 dev_err(smem->dev, in qcom_smem_enumerate_partitions()
[all …]

Completed in 58 milliseconds

12345678910>>...14