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Searched refs:dev_width (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
A Dmv_ddr_spd.c154 unsigned char dev_width = spd_data->byte_fields.byte_12.bit_fields.device_width; in mv_ddr_spd_dev_width_get() local
157 switch (dev_width) { in mv_ddr_spd_dev_width_get()
/u-boot/drivers/mtd/nand/raw/
A Domap_gpmc.c196 unsigned int dev_width = (nand->options & NAND_BUSWIDTH_16) ? 1 : 0; in omap_enable_hwecc() local
221 val = (dev_width << 7) | (info->cs << 1) | (0x1); in omap_enable_hwecc()
279 unsigned int dev_width, nsectors; in omap_enable_hwecc_bch() local
330 dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0; in omap_enable_hwecc_bch()
336 (dev_width << 7) | /* bus width */ in omap_enable_hwecc_bch()
/u-boot/arch/mips/mach-octeon/
A Dcvmx-pcie.c1413 int neg_gen, neg_width, bus, dev_gen, dev_width; in __cvmx_pcie_rc_initialize_link_gen2_v3() local
1605 dev_width = 1; /* Device max lane width (1-16) */ in __cvmx_pcie_rc_initialize_link_gen2_v3()
1645 dev_width = (cap >> 4) & 0x3f; /* Max lane width of PEM (1-16) */ in __cvmx_pcie_rc_initialize_link_gen2_v3()
1648 pcie_port, dev_width, dev_gen); in __cvmx_pcie_rc_initialize_link_gen2_v3()
1661 desired_width = (dev_width < max_width) ? dev_width : max_width; in __cvmx_pcie_rc_initialize_link_gen2_v3()

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