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Searched refs:dsmpd (Results 1 – 9 of 9) sorted by relevance

/u-boot/drivers/clk/starfive/
A Dclk-jh7110-pll.c95 .dsmpd = 0x18,
112 .dsmpd = 0x24,
129 .dsmpd = 0x2c,
185 PLLX_SET(pll->offset->dsmpd, pll->offset->dsmpd_mask, 1); in jh7110_pll_set_rate()
204 u32 dacpd, dsmpd; in jh7110_pllx_recalc_rate() local
210 dsmpd = getbits_le32((ulong)pll->base + pll->offset->dsmpd, in jh7110_pllx_recalc_rate()
247 if (dacpd == 1 && dsmpd == 1) in jh7110_pllx_recalc_rate()
249 else if (dacpd == 0 && dsmpd == 0) in jh7110_pllx_recalc_rate()
A Dclk.h32 u32 dsmpd; member
/u-boot/drivers/clk/rockchip/
A Dclk_pll.c128 rate_table->dsmpd = 1; in rockchip_pll_clk_set_by_auto()
165 rate_table->dsmpd = 0; in rockchip_pll_clk_set_by_auto()
265 __func__, rate->rate, rate->postdiv2, rate->dsmpd, rate->frac); in rk3036_pll_set_rate()
289 if (!rate->dsmpd) { in rk3036_pll_set_rate()
292 rate->dsmpd << RK3036_PLLCON1_DSMPD_SHIFT); in rk3036_pll_set_rate()
321 u32 refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac; in rk3036_pll_get_rate() local
344 dsmpd = (con & RK3036_PLLCON1_DSMPD_MASK) >> in rk3036_pll_get_rate()
350 if (dsmpd == 0) { in rk3036_pll_get_rate()
A Dclk_px30.c44 .dsmpd = _dsmpd, \
/u-boot/arch/arm/include/asm/arch-rockchip/
A Dclock.h68 .dsmpd = _dsmpd, \
92 unsigned int dsmpd; member
A Dcru_px30.h106 unsigned int dsmpd; member
A Dcru_rv1126.h143 unsigned int dsmpd; member
A Dcru_rk3568.h118 unsigned int dsmpd; member
/u-boot/drivers/ram/rockchip/
A Dsdram_rv1126.c301 u32 dsmpd = 1; in rkclk_set_dpll() local
334 dsmpd = 0; in rkclk_set_dpll()
345 writel(DSMPD(dsmpd) | POSTDIV2(postdiv2) | REFDIV(refdiv), in rkclk_set_dpll()

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