| /u-boot/drivers/misc/ |
| A D | rockchip-efuse.c | 95 struct rockchip_efuse_plat *efuse = dev_get_plat(dev); in rockchip_rk3036_efuse_read() local
99 writel(EFUSE_LOAD, efuse->base + EFUSE_CTRL); in rockchip_rk3036_efuse_read()
114 writel(0x0, efuse->base + EFUSE_CTRL); in rockchip_rk3036_efuse_read()
126 writel(EFUSE_LOAD, efuse->base + EFUSE_CTRL); in rockchip_rk3128_efuse_read()
141 writel(0x0, efuse->base + EFUSE_CTRL); in rockchip_rk3128_efuse_read()
153 writel(EFUSE_CSB, efuse->base + EFUSE_CTRL); in rockchip_rk3288_efuse_read()
183 efuse->base + RK3328_AUTO_CTRL); in rockchip_rk3328_efuse_read()
191 *buffer++ = readl(efuse->base + RK3328_DOUT); in rockchip_rk3328_efuse_read()
206 efuse->base + EFUSE_CTRL); in rockchip_rk3399_efuse_read()
210 setbits_le32(efuse->base + EFUSE_CTRL, in rockchip_rk3399_efuse_read()
[all …]
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| /u-boot/board/ti/dra7xx/ |
| A D | evm.c | 383 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
394 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
405 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
422 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
431 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
442 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
453 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
470 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
479 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
500 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
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| /u-boot/doc/device-tree-bindings/exynos/ |
| A D | tmu.txt | 14 - samsung,efuse-min-value : SOC efuse min value (Constant 40)
15 - efuse-value should be more than this value.
16 - samsung,efuse-value : SOC actual efuse value (Literal value)
19 - samsung,efuse-max-value : SoC max efuse value (Constant 100)
20 - efuse-value should be less than this value.
39 samsung,efuse-min-value = <40>;
40 samsung,efuse-value = <55>;
41 samsung,efuse-max-value = <100>;
|
| /u-boot/board/ti/am57xx/ |
| A D | board.c | 361 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
372 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
379 .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
389 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
409 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
420 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
427 .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
437 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
457 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
468 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
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| /u-boot/arch/arm/mach-mvebu/ |
| A D | efuse.c | 110 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse()
112 val.lock = readl(&efuse->bit64); in do_prog_efuse()
121 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse()
125 writel(val.lock, &efuse->bit64); in do_prog_efuse()
133 struct mvebu_hd_efuse *efuse; in prog_efuse() local
140 efuse = get_efuse_line(nr); in prog_efuse()
141 if (!efuse) in prog_efuse()
231 struct mvebu_hd_efuse *efuse; in mvebu_read_efuse() local
238 efuse = get_efuse_line(nr); in mvebu_read_efuse()
239 if (!efuse) in mvebu_read_efuse()
[all …]
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| A D | Makefile | 33 obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
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| /u-boot/doc/usage/cmd/ |
| A D | sm.rst | 34 Read <size> bytes starting from <offset> from efuse memory bank and write
38 Write into efuse memory bank, starting from <offset>, the <size> bytes
42 Read <size> bytes starting from <offset> from efuse memory bank and print
|
| /u-boot/arch/arm/dts/ |
| A D | omap4460.dtsi | 55 "efuse-address";
58 /*uV ABB efuse rbb_m fbb_m vset_m*/
73 "efuse-address";
76 /*uV ABB efuse rbb_m fbb_m vset_m*/
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| A D | exynos5420-smdk5420.dts | 31 samsung,efuse-min-value = <40>;
32 samsung,efuse-value = <55>;
33 samsung,efuse-max-value = <100>;
|
| A D | keystone-k2l-netcp.dtsi | 107 reg-names = "efuse";
170 efuse-mac = <1>;
182 efuse-mac = <0>;
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| A D | keystone-k2hk-netcp.dtsi | 125 reg-names = "efuse";
190 efuse-mac = <1>;
202 efuse-mac = <0>;
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| A D | keystone-k2e-netcp.dtsi | 107 reg-names = "efuse";
186 efuse-mac = <1>;
198 efuse-mac = <0>;
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| A D | uniphier-pro5.dtsi | 394 efuse@100 {
395 compatible = "socionext,uniphier-efuse";
399 efuse@130 {
400 compatible = "socionext,uniphier-efuse";
404 efuse@200 {
405 compatible = "socionext,uniphier-efuse";
409 efuse@300 {
410 compatible = "socionext,uniphier-efuse";
414 efuse@400 {
415 compatible = "socionext,uniphier-efuse";
|
| A D | keystone-k2g-netcp.dtsi | 97 reg-names = "efuse";
145 efuse-mac = <1>;
|
| A D | exynos5800-peach-pi.dts | 66 samsung,efuse-min-value = <40>;
67 samsung,efuse-value = <55>;
68 samsung,efuse-max-value = <100>;
|
| A D | omap443x.dtsi | 50 /*uV ABB efuse rbb_m fbb_m vset_m*/
|
| A D | uniphier-ld4.dtsi | 355 efuse@100 {
356 compatible = "socionext,uniphier-efuse";
360 efuse@130 {
361 compatible = "socionext,uniphier-efuse";
|
| A D | uniphier-sld8.dtsi | 360 efuse@100 {
361 compatible = "socionext,uniphier-efuse";
365 efuse@200 {
366 compatible = "socionext,uniphier-efuse";
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| A D | exynos5250-smdk5250.dts | 100 samsung,efuse-min-value = <40>;
101 samsung,efuse-value = <55>;
102 samsung,efuse-max-value = <100>;
|
| A D | uniphier-pro4.dtsi | 430 efuse@100 {
431 compatible = "socionext,uniphier-efuse";
435 efuse@130 {
436 compatible = "socionext,uniphier-efuse";
440 efuse@200 {
441 compatible = "socionext,uniphier-efuse";
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| A D | exynos5420-peach-pit.dts | 54 samsung,efuse-min-value = <40>;
55 samsung,efuse-value = <55>;
56 samsung,efuse-max-value = <100>;
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| /u-boot/arch/arm/mach-omap2/ |
| A D | clocks-common.c | 496 if (!v->efuse.reg[opp]) in optimize_vcore_voltage()
499 switch (v->efuse.reg_bits) { in optimize_vcore_voltage()
501 val = readw(v->efuse.reg[opp]); in optimize_vcore_voltage()
504 val = readl(v->efuse.reg[opp]); in optimize_vcore_voltage()
508 v->efuse.reg[opp], v->efuse.reg_bits); in optimize_vcore_voltage()
514 v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp]); in optimize_vcore_voltage()
519 __func__, v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp], in optimize_vcore_voltage()
603 abb_setup(vcores->mpu.efuse.reg[opp], in scale_vcores()
616 abb_setup(vcores->mm.efuse.reg[opp], in scale_vcores()
629 abb_setup(vcores->gpu.efuse.reg[opp], in scale_vcores()
[all …]
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| /u-boot/arch/arm/mach-mvebu/armada3700/ |
| A D | Makefile | 6 obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
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| /u-boot/arch/arm/mach-omap2/omap5/ |
| A D | hw_data.c | 369 .mpu.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MPU_OPNO_VMIN,
370 .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
372 .core.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_CORE_OPNO_VMIN,
373 .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
375 .mm.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MM_OPNO_VMIN,
376 .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
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| /u-boot/arch/arm/mach-aspeed/ast2600/ |
| A D | board_common.c | 96 if (readl(scu->efuse) & SCU_EFUSE_DIS_VGA) in board_add_ram_info()
|