| /u-boot/drivers/mmc/ |
| A D | rockchip_dw_mmc.c | 33 int fifo_depth; member 81 priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); in rockchip_dwmmc_of_to_plat() 83 if (priv->fifo_depth < 0) in rockchip_dwmmc_of_to_plat() 129 priv->fifo_depth = dtplat->fifo_depth; in rockchip_dwmmc_probe() 143 RX_WMARK(priv->fifo_depth / 2 - 1) | in rockchip_dwmmc_probe() 144 TX_WMARK(priv->fifo_depth / 2); in rockchip_dwmmc_probe()
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| A D | snps_dw_mmc.c | 83 u32 fifo_depth; in snps_dwmmc_of_to_plat() local 92 ret = dev_read_u32(dev, "fifo-depth", &fifo_depth); in snps_dwmmc_of_to_plat() 94 if (fifo_depth < FIFO_MIN || fifo_depth > FIFO_MAX) in snps_dwmmc_of_to_plat() 98 RX_WMARK(fifo_depth / 2 - 1) | in snps_dwmmc_of_to_plat() 99 TX_WMARK(fifo_depth / 2); in snps_dwmmc_of_to_plat()
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| A D | socfpga_dw_mmc.c | 119 int fifo_depth; in socfpga_dwmmc_of_to_plat() local 121 fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), in socfpga_dwmmc_of_to_plat() 123 if (fifo_depth < 0) { in socfpga_dwmmc_of_to_plat() 140 RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2); in socfpga_dwmmc_of_to_plat()
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| A D | ftsdc010_mci.c | 43 fdt32_t fifo_depth; member 59 int fifo_depth; member 401 priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); in ftsdc010_mmc_of_to_plat()
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| A D | dw_mmc.c | 144 u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> in dwmci_data_transfer() local 197 len = fifo_depth - ((len >> in dwmci_data_transfer()
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| /u-boot/drivers/i2c/ |
| A D | i2c-cdns.c | 138 u32 fifo_depth; member 281 if (len && readl(®s->transfer_size) == i2c_bus->fifo_depth) { in cdns_i2c_write_data() 317 return hold_quirk && (curr_recv_count == i2c_bus->fifo_depth + 1); in cdns_is_hold_quirk() 332 if (recv_count > i2c_bus->fifo_depth) in cdns_i2c_read_data() 354 if (recv_count < i2c_bus->fifo_depth && in cdns_i2c_read_data() 370 (curr_recv_count - i2c_bus->fifo_depth)) in cdns_i2c_read_data() 376 if ((recv_count - i2c_bus->fifo_depth) > in cdns_i2c_read_data() 381 i2c_bus->fifo_depth; in cdns_i2c_read_data() 383 writel(recv_count - i2c_bus->fifo_depth, in cdns_i2c_read_data() 503 i2c_bus->fifo_depth = dev_read_u32_default(dev, "fifo-depth", in cdns_i2c_of_to_plat()
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| /u-boot/drivers/net/phy/ |
| A D | dp83867.c | 120 int fifo_depth; member 238 dp83867->fifo_depth = ofnode_read_u32_default(node, "ti,fifo-depth", in dp83867_of_init() 286 val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT); in dp83867_config() 357 (dp83867->fifo_depth << DP83867_PHYCTRL_RXFIFO_SHIFT) | in dp83867_config() 358 (dp83867->fifo_depth << DP83867_PHYCTRL_TXFIFO_SHIFT)); in dp83867_config()
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| /u-boot/drivers/spi/ |
| A D | spi-sunxi.c | 128 u32 fifo_depth; member 349 nbytes = min(len, (priv->variant->fifo_depth - 1)); in sun4i_spi_xfer() 528 .fifo_depth = 64, 534 .fifo_depth = 128, 542 .fifo_depth = 64,
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| A D | uniphier_spi.c | 83 u8 fifo_depth; member 190 val |= FIELD_PREP(SSI_FC_TXFTH_MASK, priv->fifo_depth); in uniphier_spi_claim_bus() 191 val |= FIELD_PREP(SSI_FC_RXFTH_MASK, priv->fifo_depth); in uniphier_spi_claim_bus() 391 priv->fifo_depth = SSI_FIFO_DEPTH; in uniphier_spi_probe()
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| A D | zynq_spi.c | 73 u8 fifo_depth; member 132 priv->fifo_depth = ZYNQ_SPI_FIFO_DEPTH; in zynq_spi_probe() 260 while ((tx_tvl < priv->fifo_depth) && tx_len) { in zynq_spi_xfer()
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| A D | cadence_qspi.h | 205 u32 fifo_depth; member 228 unsigned int fifo_depth; member
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| A D | pic32_spi.c | 64 u32 fifo_depth; /* FIFO depth in bytes */ member 195 priv->fifo_n_word = DIV_ROUND_UP(priv->fifo_depth, wordlen / 8); in pic32_spi_set_word_size() 358 priv->fifo_depth = 16; in pic32_spi_hw_init()
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| A D | cadence_qspi.c | 204 priv->fifo_depth = plat->fifo_depth; in cadence_spi_probe() 395 plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128); in cadence_spi_of_to_plat()
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| A D | spi-sifive.c | 99 u32 fifo_depth; member 234 unsigned int n_words = min(remaining_len, spi->fifo_depth); in sifive_spi_xfer() 437 spi->fifo_depth = dev_read_u32_default(bus, in sifive_spi_probe()
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| A D | xilinx_spi.c | 108 unsigned int fifo_depth; member 118 priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0); in xilinx_spi_probe() 188 i < priv->fifo_depth) { in xilinx_spi_fill_txfifo()
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| A D | zynq_qspi.c | 95 u8 fifo_depth; member 197 priv->fifo_depth = ZYNQ_QSPI_FIFO_DEPTH; in zynq_qspi_probe() 506 zynq_qspi_fill_tx_fifo(priv, priv->fifo_depth); in zynq_qspi_start_transfer()
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| A D | cadence_qspi_apb.c | 345 writel(priv->fifo_depth / 2, priv->regbase + CQSPI_REG_SRAMPARTITION); in cadence_qspi_apb_controller_init()
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| /u-boot/doc/develop/driver-model/ |
| A D | of-plat.rst | 88 fdt32_t fifo_depth; 104 .fifo_depth = 0x100, 213 int fifo_depth; 224 plat->fifo_depth = fdtdec_get_int(blob, node, "fifo-depth", 0); 238 plat->fifo_depth = dtplat->fifo_depth; 241 writel(plat->fifo_depth, ...)
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