| /u-boot/drivers/gpio/ |
| A D | qcom_pmic_gpio.c | 76 uint32_t gpio_base = priv->pid + REG_OFFSET(offset); in qcom_gpio_set_direction() local
81 ret = pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, in qcom_gpio_set_direction()
105 gpio_base + REG_LV_MV_OUTPUT_CTL, in qcom_gpio_set_direction()
134 return pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, 0, in qcom_gpio_set_direction()
152 uint32_t gpio_base = priv->pid + REG_OFFSET(offset); in qcom_gpio_get_function() local
155 reg = pmic_reg_read(dev->parent, gpio_base + REG_CTL); in qcom_gpio_get_function()
185 uint32_t gpio_base = priv->pid + REG_OFFSET(offset); in qcom_gpio_get_value() local
188 reg = pmic_reg_read(dev->parent, gpio_base + REG_STATUS); in qcom_gpio_get_value()
199 uint32_t gpio_base = priv->pid + REG_OFFSET(offset); in qcom_gpio_set_value() local
204 gpio_base + REG_LV_MV_OUTPUT_CTL, in qcom_gpio_set_value()
[all …]
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| A D | gpio-uclass.c | 67 if (gpio >= uc_priv->gpio_base && in gpio_to_device()
68 gpio < uc_priv->gpio_base + uc_priv->gpio_count) { in gpio_to_device()
69 gpio_desc_init(desc, dev, gpio - uc_priv->gpio_base); in gpio_to_device()
130 offset = numeric - uc_priv->gpio_base; in dm_gpio_lookup_name()
179 *gpiop = uc_priv->gpio_base + desc.offset; in gpio_lookup_name()
1316 uc_priv->gpio_base = base; in gpio_renumber()
1333 return uc_priv->gpio_base + desc->offset; in gpio_get_number()
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| A D | gpio-fxl6408.c | 360 uc_priv->gpio_base = -1; in fxl6408_probe()
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| /u-boot/board/renesas/silk/ |
| A D | silk_spl.c | 153 static const u32 gpio_base = 0xe6050000; in spl_init_gpio() local
158 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
159 writel(BIT(23), gpio_base | 0x5020); in spl_init_gpio()
162 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
163 writel(BIT(23), gpio_base | 0x5000); in spl_init_gpio()
166 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
169 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
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| /u-boot/board/renesas/lager/ |
| A D | lager_spl.c | 139 static const u32 gpio_base = 0xe6050000; in spl_init_gpio() local
144 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
147 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
150 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
153 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
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| /u-boot/board/renesas/alt/ |
| A D | alt_spl.c | 153 static const u32 gpio_base = 0xe6050000; in spl_init_gpio() local
158 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
161 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
164 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
167 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
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| /u-boot/board/renesas/gose/ |
| A D | gose_spl.c | 147 static const u32 gpio_base = 0xe6050000; in spl_init_gpio() local
152 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
155 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
158 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
161 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
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| /u-boot/board/renesas/koelsch/ |
| A D | koelsch_spl.c | 152 static const u32 gpio_base = 0xe6050000; in spl_init_gpio() local
157 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
160 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
163 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
166 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
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| /u-boot/board/renesas/porter/ |
| A D | porter_spl.c | 151 static const u32 gpio_base = 0xe6050000; in spl_init_gpio() local
156 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
159 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
162 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
165 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
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| /u-boot/board/renesas/stout/ |
| A D | stout_spl.c | 142 static const u32 gpio_base = 0xe6050000; in spl_init_gpio() local
147 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
150 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
153 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
156 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
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| /u-boot/include/asm-generic/ |
| A D | gpio.h | 423 unsigned gpio_base; member
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| /u-boot/drivers/pinctrl/nuvoton/ |
| A D | pinctrl-npcm8xx.c | 55 void __iomem *gpio_base; member
859 void __iomem *base = priv->gpio_base + (0x1000 * bank); in npcm8xx_pinconf_set()
988 priv->gpio_base = dev_read_addr_ptr(dev); in npcm8xx_pinctrl_probe()
989 if (!priv->gpio_base) in npcm8xx_pinctrl_probe()
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| A D | pinctrl-npcm7xx.c | 1228 void __iomem *gpio_base; member
1237 priv->gpio_base = dev_read_addr_ptr(dev); in npcm7xx_pinctrl_probe()
1238 if (!priv->gpio_base) in npcm7xx_pinctrl_probe()
1432 void __iomem *base = priv->gpio_base + (NPCM7XX_GPIO_BANK_OFFSET * bank); in npcm7xx_set_drive_strength()
1461 void __iomem *base = priv->gpio_base + (NPCM7XX_GPIO_BANK_OFFSET * bank); in npcm7xx_set_slew_rate()
1507 void __iomem *base = priv->gpio_base + (0x1000 * bank); in npcm7xx_pinconf_set()
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| /u-boot/arch/arm/dts/ |
| A D | mt7981.dtsi | 128 reg-names = "gpio_base", "iocfg_rt_base", "iocfg_rm_base",
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| A D | mt7986.dtsi | 142 reg-names = "gpio_base", "iocfg_rt_base", "iocfg_rb_base",
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