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/u-boot/lib/
A Dmd5.c99 byteReverse(ctx->in, 16); in MD5Update()
100 MD5Transform(ctx->buf, (__u32 *) ctx->in); in MD5Update()
107 memmove(ctx->in, buf, 64); in MD5Update()
108 byteReverse(ctx->in, 16); in MD5Update()
109 MD5Transform(ctx->buf, (__u32 *) ctx->in); in MD5Update()
116 memmove(ctx->in, buf, len); in MD5Update()
134 p = ctx->in + count; in MD5Final()
144 byteReverse(ctx->in, 16); in MD5Final()
148 memset(ctx->in, 0, 56); in MD5Final()
153 byteReverse(ctx->in, 14); in MD5Final()
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A Dlz4_wrapper.c22 const void *in = src; in ulz4fn() local
37 in += sizeof(u32); in ulz4fn()
38 flags = *(u8 *)in; in ulz4fn()
39 in += sizeof(u8); in ulz4fn()
40 block_desc = *(u8 *)in; in ulz4fn()
41 in += sizeof(u8); in ulz4fn()
59 in += sizeof(u64); in ulz4fn()
62 in += sizeof(u8); in ulz4fn()
69 in += sizeof(u32); in ulz4fn()
102 in += block_size; in ulz4fn()
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/u-boot/fs/yaffs2/
A Dyaffs_yaffs1.c35 struct yaffs_obj *in; in yaffs1_scan() local
148 if (!in) in yaffs1_scan()
151 if (in) { in yaffs1_scan()
161 if (in && in yaffs1_scan()
169 in->variant. in yaffs1_scan()
189 if (in && in->variant_type != oh->type) { in yaffs1_scan()
198 in = NULL; in yaffs1_scan()
205 if (!in) in yaffs1_scan()
230 if (in && in->valid) { in yaffs1_scan()
255 if (in && !in->valid && in yaffs1_scan()
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A Dyaffs_guts.c1653 if (in->my_dev->param.is_yaffs2 && in->parent != in->my_dev->del_dir) { in yaffs_generic_obj_del()
1660 yaffs_chunk_del(in->my_dev, in->hdr_chunk, 1, __LINE__); in yaffs_generic_obj_del()
1908 return in; in yaffs_find_by_number()
2138 if (!in) { in yaffs_create_obj()
2180 in = NULL; in yaffs_create_obj()
2183 if (in) in yaffs_create_obj()
2186 return in; in yaffs_create_obj()
3166 if (!in || !in->lazy_loaded || in->hdr_chunk < 1) in yaffs_check_obj_details_loaded()
3278 if (in->fake && in != dev->root_dir && !force && !xmod) in yaffs_update_oh()
3823 yaffs_change_obj_name(in, in->my_dev->del_dir, in yaffs_unlink_file_if_needed()
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/u-boot/drivers/firmware/scmi/
A Dsandbox-scmi_agent.c158 "clk%u", in->clock_id); in sandbox_scmi_clock_attribs()
169 struct scmi_clk_rate_set_in *in = NULL; in sandbox_scmi_clock_rate_set() local
186 u64 rate = ((u64)in->rate_msb << 32) + in->rate_lsb; in sandbox_scmi_clock_rate_set()
227 struct scmi_clk_state_in *in = NULL; in sandbox_scmi_clock_gate() local
243 } else if (in->attributes > 1) { in sandbox_scmi_clock_gate()
246 clk_state->enabled = in->attributes; in sandbox_scmi_clock_gate()
256 struct scmi_rd_attr_in *in = NULL; in sandbox_scmi_rd_attribs() local
284 struct scmi_rd_reset_in *in = NULL; in sandbox_scmi_rd_reset() local
300 } else if (in->reset_state > 1) { in sandbox_scmi_rd_reset()
314 reset_state->asserted = in->flags & in sandbox_scmi_rd_reset()
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/u-boot/arch/powerpc/dts/
A Dkmcoge5ne.dts98 0 2 1 0 1 0 /* MDC (PA2, in, f1) */
100 0 3 1 0 1 0 /* TxD0 (PA3, in, f1) */
101 0 4 1 0 1 0 /* TxD1 (PA4, in, f1) */
102 0 5 1 0 1 0 /* TxD2 (PA5, in, f1) */
103 0 6 1 0 1 0 /* TxD3 (PA6, in, f1) */
108 0 7 1 0 1 0 /* TX_EN (PA7, in, f1) */
138 0 2 1 0 1 0 /* MDC (PA2, in, f1) */
142 3 6 2 0 1 0 /* RxD0 (PD6, in, f1) */
143 3 7 2 0 1 0 /* RxD1 (PD7, in, f1) */
145 3 12 2 0 1 0 /* RX_DV (PD12, in, f1) */
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A Dkmeter1.dts143 1 20 2 0 1 0 /* RxD0 (PB20, in, f1) */
144 1 21 2 0 1 0 /* RxD1 (PB21, in, f1) */
146 1 26 2 0 1 0 /* RX_DV (PB26, in, f1) */
147 1 27 2 0 1 0 /* RX_ER (PB27, in, f1) */
161 3 6 2 0 1 0 /* RxD0 (PD6, in, f1) */
162 3 7 2 0 1 0 /* RxD1 (PD7, in, f1) */
164 3 12 2 0 1 0 /* RX_DV (PD12, in, f1) */
165 3 13 2 0 1 0 /* RX_ER (PD13, in, f1) */
244 0 14 2 0 2 0 /* RSync0 (PA14, in, f2) */
245 2 7 2 0 1 0 /* RxClk8 (PC7, in, f1) */
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/u-boot/arch/arm/mach-mvebu/armada3700/
A Defuse.c84 u32 in[2]; in rwtm_otp_read() local
94 in[0] = row; in rwtm_otp_read()
95 in[1] = word * 32; in rwtm_otp_read()
107 in[0] = row; in rwtm_otp_read()
118 u32 in[4]; in rwtm_otp_write() local
129 in[0] = row; in rwtm_otp_write()
131 in[2] = data; in rwtm_otp_write()
141 in[0] = row; in rwtm_otp_write()
142 in[1] = 0; in rwtm_otp_write()
143 in[2] = 0; in rwtm_otp_write()
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/u-boot/doc/device-tree-bindings/usb/
A Ddwc2.txt6 - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
7 - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
8 - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
12 - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
13 - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
20 configured in FS mode;
22 configured in HS mode;
23 - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
24 configured in HS mode;
37 - g-rx-fifo-size: size of rx fifo size in gadget mode.
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/u-boot/doc/
A DREADME.mxc_ocotp14 The section numbers in this file refer to the i.MX6 Reference Manual.
16 A fuse word contains 32 fuse bit slots, as explained in 46.2.1.
18 A bank contains 8 fuse word slots, as explained in 46.2.1 and shown by the
19 memory map in 46.4.
22 implemented in the fusebox.
24 See the README files of the SoCs using this driver in order to know the
25 conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
32 using "Bankx Wordy" from the memory map in 46.4. This is explained in
33 detail by the first two paragraphs in 46.2.1.2.
37 the steps in 46.2.1.2.
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A DREADME.fsl_iim12 The section numbers in this file refer to the i.MX25 Reference Manual.
14 A fuse word contains 8 fuse bit slots, as explained in 30.4.2.2.1.
16 A bank contains 256 fuse word slots, as shown by the memory map in 30.3.1.
19 implemented in the fusebox.
21 See the README files of the SoCs using this driver in order to know the
22 conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
29 using "Word y of Bank x" from the register summary in 30.3.2. This is
30 explained in detail in 30.4.5.1.
33 Sense operations are implemented as explained in 30.4.5.2.
36 Program operations are implemented as explained in 30.4.5.3. Following
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A DREADME.sha15 This SHA1 sum is used, to check, if the U-Boot Image in Flash is not
12 -p calculate the SHA1 sum from the U-Boot image in flash and print
13 -c check the U-Boot image in flash
16 calculates and prints the SHA1 sum, from the Image stored in Flash
19 check, if the SHA1 sum from the Image stored in Flash is correct
26 If you want to store a new Image in Flash for the pcs440ep board,
29 a) cp the new Image on a position in RAM (here 0x300000)
35 b) Initialize the SHA1 sum in the Image with 0x00
36 The SHA1 sum is stored in Flash at:
40 for the example in RAM: 0x300000 + 0x60000 + -0x20
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/u-boot/arch/arm/dts/
A Dfsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi17 * - otherwise it is 2nd port in slot 1.
19 * - if DIP SW5[1] = 0 it is 3rd port in slot 1,
20 * - otherwise it is 1st port in slot 3.
22 * - if DIP SW5[2-3] = 00b it is 4th port in slot 1,
23 * - if DIP SW5[2-3] = 01b it is 2nd port in slot 3,
24 * - if DIP SW5[2-3] = 11b it is 1st port in slot 4.
27 * SCH-24801 cards are required in slots 1 and 2.
47 managed = "in-band-status";
54 managed = "in-band-status";
61 managed = "in-band-status";
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/u-boot/common/spl/
A DKconfig.vpl21 bool "Support cache drivers in VPL"
23 Enable support for cache drivers in VPL.
26 bool "Support CRC32 in VPL"
36 bool "Support SPI DM drivers in VPL"
41 bool "Support SPI DM FLASH drivers in VPL"
98 bool "Support GPIO in VPL"
120 bool "Support hashing drivers in VPL"
130 bool "Support I2C in VPL"
137 bool "Support MMC in VPL"
232 bool "Declare binman symbols in VPL"
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A DKconfig.tpl12 bool "Support binman symbols in TPL"
16 This enables use of symbols in TPL which refer to other entries in
63 bool "Call board-specific initialization in TPL"
70 bool "Support bootcount in TPL"
172 bool "Support CRC32 in TPL"
182 bool "Support misc drivers in TPL"
195 bool "Support GPIO in TPL"
308 SPI NOR in U-Boot TPL.
317 bool "Support SPI DM drivers in TPL"
319 Enable support for SPI DM drivers in TPL.
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/u-boot/doc/develop/driver-model/
A Dmigration.rst6 U-Boot has been migrating to a new driver model since its introduction in
28 time for inclusion in the 2019.04 rerelease.
38 other base driver model options in time for inclusion in the 2019.07 rerelease.
48 other base driver model options in time for inclusion in the 2019.07 rerelease.
67 to move the migration with in the deadline.
84 driver model options in time for inclusion in the 2019.07 release.
92 other base driver model options in time for inclusion in the 2020.07 release.
100 other base driver model options in time for inclusion in the 2021.10 release.
108 other base driver model options in time for inclusion in the 2022.10 release.
111 in which case you need an early timer also. For example drivers, see
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/u-boot/lib/zlib/
A Dinffast.c100 in = strm->next_in - OFF; in inflate_fast()
101 last = in + (strm->avail_in - 5); in inflate_fast()
102 if (in > last && strm->avail_in > 5) { in inflate_fast()
107 strm->avail_in = 0xffffffff - (uintptr_t)in; in inflate_fast()
108 last = in + (strm->avail_in - 5); in inflate_fast()
131 hold += (unsigned long)(PUP(in)) << bits; in inflate_fast()
133 hold += (unsigned long)(PUP(in)) << bits; in inflate_fast()
323 } while (in < last && out < end); in inflate_fast()
327 in -= len; in inflate_fast()
332 strm->next_in = in + OFF; in inflate_fast()
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/u-boot/lib/lzma/
A Dhistory.txt30 - Some changes in ANSI-C 7z Decoder interfaces.
51 - The bug in ANSI-C LZMA Decoder was fixed:
55 - LZMA SDK is placed in the public domain.
67 allocated range in some rare cases.
79 - Speed optimizations in Ñ++ LZMA Decoder.
100 - Small changes in .h files in ANSI-C version.
138 - The bug in 7z_C (7zIn.c) was fixed:
155 - The bug in LzmaDecodeSize.c was fixed:
162 - Fixes in 7z_C code and LzmaTest.c:
169 - Small fixes in C++ code
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/u-boot/lib/rsa/
A DKconfig8 verification in U-Boot.
10 The Modular Exponentiation algorithm in RSA is implemented using
27 Add RSA signature verification support in SPL.
42 pre-calculated key properties, that are stored in fdt blob, in
45 provide such additional key properties in standardized form,
48 directly specified in image_sign_info, where all the necessary
60 pre-calculated key properties, that are stored in fdt blob, in
63 provide such additional key properties in standardized form,
66 directly specified in image_sign_info, where all the necessary
68 in the SPL.
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/u-boot/drivers/power/regulator/
A Dscmi_regulator.c40 struct scmi_voltd_config_set_in in = { in scmi_voltd_set_enable() local
47 in, out); in scmi_voltd_set_enable()
61 struct scmi_voltd_config_get_in in = { in scmi_voltd_get_enable() local
67 in, out); in scmi_voltd_get_enable()
85 struct scmi_voltd_level_set_in in = { in scmi_voltd_set_voltage_level() local
92 in, out); in scmi_voltd_set_voltage_level()
106 struct scmi_voltd_level_get_in in = { in scmi_voltd_get_voltage_level() local
112 in, out); in scmi_voltd_get_voltage_level()
149 .in_msg = (u8 *)&in, in scmi_regulator_probe()
150 .in_msg_sz = sizeof(in), in scmi_regulator_probe()
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/u-boot/fs/jffs2/
A Dcompr_rubin.c46 void rubin_do_decompress(unsigned char *bits, unsigned char *in, in rubin_do_decompress() argument
61 temp = *(u32 *) in; in rubin_do_decompress()
69 rec_q = (in[0] << 8) | in[1]; in rubin_do_decompress()
86 u32 *p = (u32 *)in; in rubin_do_decompress()
89 in = (unsigned char *)p; in rubin_do_decompress()
/u-boot/test/
A Dcompression.c165 void *in, unsigned long in_size, in uncompress_using_gzip() argument
180 void *in, unsigned long in_size, in compress_using_bzip2() argument
186 ut_asserteq_mem(plain, in, in_size); in compress_using_bzip2()
221 ut_asserteq_mem(plain, in, in_size); in compress_using_lzma()
234 void *in, unsigned long in_size, in uncompress_using_lzma() argument
255 ut_asserteq_mem(plain, in, in_size); in compress_using_lzo()
268 void *in, unsigned long in_size, in uncompress_using_lzo() argument
290 ut_asserteq_mem(plain, in, in_size); in compress_using_lz4()
303 void *in, unsigned long in_size, in uncompress_using_lz4() argument
325 ut_asserteq_mem(plain, in, in_size); in compress_using_zstd()
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/u-boot/arch/xtensa/
A DKconfig23 Do not enable instruction cache in U-Boot.
26 bool "Do not enable icache in SPL"
30 Do not enable instruction cache in SPL.
35 Do not enable data cache in U-Boot.
38 bool "Do not enable dcache in SPL"
42 Do not enable data cache in SPL.
/u-boot/drivers/ram/stm32mp1/
A DKconfig12 in device tree (computed by DDR tuning tools)
18 activate interactive support in STM32MP1 DDR controller driver
20 to enter in intercative mode type 'd' during SPL DDR driver
27 force interactive mode in STM32MP1 DDR controller driver
28 skip the polling of character 'd' in console
29 useful when SPL is loaded in sysram
37 activate test support for interactive support in
45 activate tuning command in STM32MP1 DDR interactive mode
/u-boot/doc/usage/cmd/
A Dfor.rst9 for <variable> in <items>; do <commands>; done
17 The counter variable of the loop is a shell variable. Please, keep in mind that
35 => for c in 1 2 3; do echo item ${c}; done
42 => for c in 1 2 3; do echo item ${c}; done
48 The first line ensures that there is no environment variable *c*. Hence in the
58 statement executed in the loop.
62 => for i in true false; do ${i}; done; echo $?
64 => for i in false true; do ${i}; done; echo $?

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