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Searched refs:intr_ctrl (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/include/asm/arch-aspeed/
A Dsdram_ast2500.h116 u32 intr_ctrl; member
A Dsdram_ast2600.h152 u32 intr_ctrl; /* offset 0x50 */ member
A Dscu_ast2500.h155 u32 intr_ctrl; member
/u-boot/drivers/ram/aspeed/
A Dsdram_ast2600.c950 writel(MCR50_RESET_ALL_INTR, &regs->intr_ctrl); in ast2600_sdrammc_common_init()
1058 writel(BIT(31), &regs->intr_ctrl); in ast2600_sdrammc_ecc_enable()
1059 writel(0, &regs->intr_ctrl); in ast2600_sdrammc_ecc_enable()
1130 clrbits_le32(&regs->intr_ctrl, MCR50_RESET_ALL_INTR); in ast2600_sdrammc_probe()
A Dsdram_ast2500.c374 setbits_le32(&regs->intr_ctrl, SDRAM_ICR_RESET_ALL); in ast2500_sdrammc_probe()
384 clrbits_le32(&regs->intr_ctrl, SDRAM_ICR_RESET_ALL); in ast2500_sdrammc_probe()
/u-boot/drivers/spi/
A Dspi-aspeed-smc.c43 u32 intr_ctrl; /* 0x08 Interrupt Control and Status */ member

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