Searched refs:l2cache (Results 1 – 7 of 7) sorted by relevance
| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| A D | spl_minimal.c | 18 ccsr_l2cache_t *l2cache = (void *)CFG_SYS_MPC85xx_L2_ADDR; in cpu_init_f() local
20 out_be32(&l2cache->l2srbar0, CFG_SYS_INIT_L2_ADDR); in cpu_init_f()
23 out_be32(&l2cache->l2errdis, in cpu_init_f()
27 out_be32(&l2cache->l2ctl, in cpu_init_f()
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| A D | cpu_init.c | 459 struct ccsr_cluster_l2 __iomem *l2cache; in enable_cluster_l2() local
500 while ((in_be32(&l2cache->l2csr0) in enable_cluster_l2()
534 cache_ctl = l2cache->l2ctl; in l2cache_init()
539 out_be32(&l2cache->l2srbar0, 0x0); in l2cache_init()
540 out_be32(&l2cache->l2srbar1, 0x0); in l2cache_init()
543 clrbits_be32(&l2cache->l2errdis, in l2cache_init()
548 clrbits_be32(&l2cache->l2ctl, in l2cache_init()
591 if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { in l2cache_init()
594 u32 l2srbar = l2cache->l2srbar0; in l2cache_init()
598 l2cache->l2srbar0 = l2srbar; in l2cache_init()
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| A D | cpu_init_early.c | 91 ccsr_l2cache_t *l2cache = (void *)CFG_SYS_MPC85xx_L2_ADDR; in cpu_init_early_f() local
147 out_be32(&l2cache->l2srbar0, SRAM_BASE_ADDR); in cpu_init_early_f()
149 out_be32(&l2cache->l2errdis, in cpu_init_early_f()
152 out_be32(&l2cache->l2ctl, in cpu_init_early_f()
172 clrbits_be32(&l2cache->l2ctl, in cpu_init_early_f()
175 out_be32(&l2cache->l2srbar0, 0x0); in cpu_init_early_f()
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| A D | fdt.c | 223 volatile ccsr_l2cache_t *l2cache = (void *)CFG_SYS_MPC85xx_L2_ADDR; in l2cache_size() local
224 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3; in l2cache_size()
299 struct ccsr_cluster_l2 *l2cache = in ft_fixup_l2cache() local
301 u32 l2cfg0 = in_be32(&l2cache->l2cfg0); in ft_fixup_l2cache()
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| /u-boot/drivers/cache/ |
| A D | cache-v5l2.c | 17 struct l2cache { struct
77 struct l2cache *regs;
87 volatile struct l2cache *regs = plat->regs; in v5l2_enable()
98 volatile struct l2cache *regs = plat->regs; in v5l2_disable()
120 struct l2cache *regs; in v5l2_of_to_plat()
144 struct l2cache *regs = plat->regs; in v5l2_probe()
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| /u-boot/arch/riscv/dts/ |
| A D | fu540-c000.dtsi | 57 next-level-cache = <&l2cache>;
81 next-level-cache = <&l2cache>;
105 next-level-cache = <&l2cache>;
129 next-level-cache = <&l2cache>;
260 l2cache: cache-controller@2010000 { label
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| A D | fu540-c000-u-boot.dtsi | 107 &l2cache {
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