| /u-boot/arch/arm/mach-imx/mx6/ |
| A D | opos6ul.c | 137 static struct mx6_ddr3_cfg mem_ddr = { variable
184 mem_ddr.density = 4; in spl_dram_init()
185 mem_ddr.rowaddr = 15; in spl_dram_init()
186 mem_ddr.trcd = 1375; in spl_dram_init()
187 mem_ddr.trcmin = 4875; in spl_dram_init()
188 mem_ddr.trasmin = 3500; in spl_dram_init()
191 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in spl_dram_init()
192 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| A D | litesom.c | 137 static struct mx6_ddr3_cfg mem_ddr = { variable
168 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in spl_dram_init()
169 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
177 mem_ddr.rowaddr = 14; in spl_dram_init()
178 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/technexion/pico-imx6ul/ |
| A D | spl.c | 85 static struct mx6_ddr3_cfg mem_ddr = { variable
113 mem_ddr.rowaddr = 14; in imx6ul_spl_dram_cfg_size()
115 mem_ddr.rowaddr = 15; in imx6ul_spl_dram_cfg_size()
117 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in imx6ul_spl_dram_cfg_size()
118 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in imx6ul_spl_dram_cfg_size()
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| /u-boot/board/bsh/imx6ulz_smm_m2/ |
| A D | spl.c | 86 static struct mx6_ddr3_cfg mem_ddr = { variable
114 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in imx6ul_spl_dram_cfg()
115 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in imx6ul_spl_dram_cfg()
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| /u-boot/board/myir/mys_6ulx/ |
| A D | spl.c | 72 static struct mx6_ddr3_cfg mem_ddr = { variable
100 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in spl_dram_init()
101 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/phytec/pcl063/ |
| A D | spl.c | 73 static struct mx6_ddr3_cfg mem_ddr = { variable
101 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in spl_dram_init()
102 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/seeed/npi_imx6ull/ |
| A D | spl.c | 71 static struct mx6_ddr3_cfg mem_ddr = { variable
99 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in spl_dram_init()
100 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/variscite/dart_6ul/ |
| A D | spl.c | 78 static struct mx6_ddr3_cfg mem_ddr = { variable
109 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in spl_dram_init()
110 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/freescale/mx6ul_14x14_evk/ |
| A D | mx6ul_14x14_evk.c | 393 static struct mx6_lpddr2_cfg mem_ddr = { variable
464 static struct mx6_ddr3_cfg mem_ddr = { variable
494 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in spl_dram_init()
495 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/phytec/pcm058/ |
| A D | pcm058.c | 176 static struct mx6_ddr3_cfg mem_ddr = { variable
227 mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/freescale/mx6slevk/ |
| A D | mx6slevk.c | 314 static struct mx6_lpddr2_cfg mem_ddr = { variable
345 .dsize = mem_ddr.width / 32, in spl_dram_init()
362 mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/engicam/common/ |
| A D | spl.c | 338 static struct mx6_ddr3_cfg mem_ddr = { variable
393 mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in spl_dram_init()
394 mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); in spl_dram_init()
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| /u-boot/board/softing/vining_2000/ |
| A D | vining_2000.c | 524 static struct mx6_ddr3_cfg mem_ddr = { variable
553 .dsize = mem_ddr.width / 32, in vining2000_spl_dram_init()
570 mx6sx_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); in vining2000_spl_dram_init()
571 mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr); in vining2000_spl_dram_init()
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