| /u-boot/doc/device-tree-bindings/reserved-memory/ |
| A D | reserved-memory.txt | 1 *** Reserved memory regions ***
3 Reserved memory is specified as a node under the /reserved-memory node.
6 normal use) memory regions. Such memory regions are usually designed for
12 /reserved-memory node
19 /reserved-memory/ child nodes
74 Device node references to reserved memory
79 memory-region (optional) - phandle, specifier pairs to children of /reserved-memory
92 memory {
96 reserved-memory {
115 compatible = "acme,multimedia-memory";
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| /u-boot/arch/arm/dts/ |
| A D | r8a77950-ulcb.dts | 17 memory@48000000 {
18 device_type = "memory";
23 memory@500000000 {
24 device_type = "memory";
28 memory@600000000 {
29 device_type = "memory";
33 memory@700000000 {
34 device_type = "memory";
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| A D | r8a77950-salvator-x.dts | 16 memory@48000000 {
17 device_type = "memory";
22 memory@500000000 {
23 device_type = "memory";
27 memory@600000000 {
28 device_type = "memory";
32 memory@700000000 {
33 device_type = "memory";
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| A D | k3-j721e-som-p0.dtsi | 11 memory@80000000 {
12 device_type = "memory";
18 reserved_memory: reserved-memory {
35 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
101 c66_1_dma_memory_region: c66-dma-memory@a6000000 {
107 c66_0_memory_region: c66-memory@a6100000 {
119 c66_1_memory_region: c66-memory@a7100000 {
131 c71_0_memory_region: c71-memory@a8100000 {
353 memory-region = <&c66_0_dma_memory_region>,
359 memory-region = <&c66_1_dma_memory_region>,
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| A D | k3-j7200-som-p0.dtsi | 11 memory@80000000 {
12 device_type = "memory";
18 reserved_memory: reserved-memory {
35 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
47 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
59 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
71 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
216 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
222 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
228 memory-region = <&main_r5fss0_core0_dma_memory_region>,
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| A D | k3-j721e-r5-sk.dts | 25 memory@80000000 {
26 device_type = "memory";
32 reserved_memory: reserved-memory {
49 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
115 c66_1_dma_memory_region: c66-dma-memory@a6000000 {
121 c66_0_memory_region: c66-memory@a6100000 {
133 c66_1_memory_region: c66-memory@a7100000 {
145 c71_0_memory_region: c71-memory@a8100000 {
628 memory-region = <&c66_0_dma_memory_region>,
634 memory-region = <&c66_1_dma_memory_region>,
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| A D | skeleton.dtsi | 3 * add a compatible value. The bootloader will typically populate the memory
12 memory { device_type = "memory"; reg = <0 0>; };
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| A D | r8a774a1-hihope-rzg2m.dts | 16 memory@48000000 {
17 device_type = "memory";
22 memory@600000000 {
23 device_type = "memory";
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| A D | r8a77960-salvator-x.dts | 16 memory@48000000 {
17 device_type = "memory";
22 memory@600000000 {
23 device_type = "memory";
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| A D | skeleton64.dtsi | 4 * bootloader will typically populate the memory node.
12 memory { device_type = "memory"; reg = <0 0 0 0>; };
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| A D | r8a774b1-hihope-rzg2n.dts | 16 memory@48000000 {
17 device_type = "memory";
22 memory@480000000 {
23 device_type = "memory";
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| A D | r8a774e1-hihope-rzg2h.dts | 16 memory@48000000 {
17 device_type = "memory";
22 memory@500000000 {
23 device_type = "memory";
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| A D | r8a77960-ulcb.dts | 17 memory@48000000 {
18 device_type = "memory";
23 memory@600000000 {
24 device_type = "memory";
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| A D | socfpga_cyclone5_mcv.dtsi | 12 memory@0 {
13 name = "memory";
14 device_type = "memory";
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| A D | k3-j721e-sk.dts | 22 memory@80000000 {
23 device_type = "memory";
29 reserved_memory: reserved-memory {
112 c66_1_dma_memory_region: c66-dma-memory@a6000000 {
118 c66_0_memory_region: c66-memory@a6100000 {
124 c66_0_dma_memory_region: c66-dma-memory@a7000000 {
130 c66_1_memory_region: c66-memory@a7100000 {
142 c71_0_memory_region: c71-memory@a8100000 {
777 memory-region = <&c66_0_dma_memory_region>,
783 memory-region = <&c66_1_dma_memory_region>,
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| /u-boot/arch/powerpc/dts/ |
| A D | qoriq-sec5.2-0.dtsi | 59 compatible = "fsl,sec-v5.2-rtic-memory",
60 "fsl,sec-v5.0-rtic-memory",
61 "fsl,sec-v4.0-rtic-memory";
66 compatible = "fsl,sec-v5.2-rtic-memory",
67 "fsl,sec-v5.0-rtic-memory",
68 "fsl,sec-v4.0-rtic-memory";
73 compatible = "fsl,sec-v5.2-rtic-memory",
74 "fsl,sec-v5.0-rtic-memory",
75 "fsl,sec-v4.0-rtic-memory";
81 "fsl,sec-v5.0-rtic-memory",
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| A D | qoriq-sec4.2-0.dtsi | 54 compatible = "fsl,sec-v4.2-rtic-memory",
55 "fsl,sec-v4.0-rtic-memory";
60 compatible = "fsl,sec-v4.2-rtic-memory",
61 "fsl,sec-v4.0-rtic-memory";
66 compatible = "fsl,sec-v4.2-rtic-memory",
67 "fsl,sec-v4.0-rtic-memory";
72 compatible = "fsl,sec-v4.2-rtic-memory",
73 "fsl,sec-v4.0-rtic-memory";
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| A D | qoriq-sec5.0-0.dtsi | 54 compatible = "fsl,sec-v5.0-rtic-memory",
55 "fsl,sec-v4.0-rtic-memory";
60 compatible = "fsl,sec-v5.0-rtic-memory",
61 "fsl,sec-v4.0-rtic-memory";
66 compatible = "fsl,sec-v5.0-rtic-memory",
67 "fsl,sec-v4.0-rtic-memory";
72 compatible = "fsl,sec-v5.0-rtic-memory",
73 "fsl,sec-v4.0-rtic-memory";
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| /u-boot/board/sipeed/maix/ |
| A D | maix.c | 21 ofnode memory; in sram_init() local
25 memory = ofnode_by_compatible(ofnode_null(), "canaan,k210-sram"); in sram_init()
26 if (ofnode_equal(memory, ofnode_null())) in sram_init()
30 ret = clk_get_by_name_nodev(memory, banks[i], &clk); in sram_init()
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| /u-boot/doc/device-tree-bindings/clock/ |
| A D | rockchip,rk3368-dmc.txt | 1 RK3368 dynamic memory controller driver
4 The RK3368 DMC (dynamic memory controller) driver supports setup/initialisation
7 (a) a target-frequency (i.e. operating point) for the memory operation
9 (c) a memory-schedule (i.e. mapping from physical addresses to the address
10 pins of the memory bus)
44 - rockchip,memory-schedule:
54 #include <dt-bindings/memory/rk3368-dmc.h>
66 rockchip,memory-schedule = <DMC_MSCH_CBRD>;
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| /u-boot/doc/device-tree-bindings/memory/ |
| A D | memory.txt | 3 The memory binding for U-Boot is as in the ePAPR with the following additions:
5 Optional subnodes can be used defining the memory layout for different board
11 If subnodes are present, then the /memory node must define these properties:
19 memory-banks - list of memory banks in the same format as normal
37 memory {
65 * Default of 2GB of memory, auto-sized, so could be smaller
66 * 3.5GB of memory (with no auto-size) if (board id & 2) is 2
67 * 1GB of memory (with no auto-size) if board id is 17.
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| /u-boot/doc/usage/cmd/ |
| A D | bdinfo.rst | 43 memory.cnt = 0x1
44 memory[0] [0x40000000-0x13fffffff], 0x100000000 bytes flags: 0
57 address of the memory area for boot parameters
60 index, start address and end address of a memory bank
90 available memory and memory reservations
108 amount of memory used in the early malloc memory and its maximum size
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| /u-boot/doc/ |
| A D | README.memory-test | 2 hardware, or when using a sloppy port on some board, is memory errors.
4 incorrect initialization of the memory controller. So it appears to
5 be a good idea to always test if the memory is working correctly,
8 U-Boot implements 3 different approaches to perform memory tests:
14 memory banks on this piece of hardware. The code is supposed to be
17 catch 99% of hardware related (i. e. reliably reproducible) memory
23 This is probably the best known memory test utility in U-Boot.
35 no knowledge about memory ranges that may be in use for other
46 system memory) and for U-Boot (code, data, etc. - see above;
69 It should pointed out that _all_ these memory tests have one
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| /u-boot/arch/x86/dts/ |
| A D | skeleton.dtsi | 3 * add a compatible value. The bootloader will typically populate the memory
12 memory { device_type = "memory"; reg = <0 0>; };
|
| /u-boot/arch/mips/dts/ |
| A D | skeleton.dtsi | 4 * add a compatible value. The bootloader will typically populate the memory
18 memory {
19 device_type = "memory";
|