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Searched refs:miss (Results 1 – 8 of 8) sorted by relevance

/u-boot/doc/device-tree-bindings/cpu/
A Dnios2.txt50 altr,fast-tlb-miss-addr = <0xc7fff400>;
/u-boot/include/linux/
A Dcompiler_types.h95 unsigned long miss; member
/u-boot/arch/nios2/dts/
A D3c120_devboard.dts39 altr,fast-tlb-miss-addr = <0xc7fff400>;
A D10m50_devboard.dts28 altr,fast-tlb-miss-addr = <0xc0000100>;
/u-boot/arch/arm/include/asm/arch-octeontx2/csrs/
A Dcsrs-npc.h1103 u64 miss : 1; member
/u-boot/drivers/timer/
A DKconfig282 base, since we will miss some time taken to load U-Boot, etc. This
/u-boot/doc/develop/
A Dprocess.rst86 Sometimes patches miss the Merge Window slightly - say by a few
/u-boot/arch/arm/
A DKconfig379 A cache line is allocated on a write miss. This means that executing a

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