Searched refs:pcc_clock_sel (Results 1 – 6 of 6) sorted by relevance
| /u-boot/arch/arm/mach-imx/imx8ulp/ |
| A D | clock.c | 47 pcc_clock_sel(lpuart_pcc[index], lpuart_pcc_slots[index], clk); in lpuart_set_clk()
77 pcc_clock_sel(4, FLEXSPI2_PCC4_SLOT, PLL3_PFD2_DIV1); in init_clk_fspi()
186 pcc_clock_sel(4, SDHC0_PCC4_SLOT, PLL3_PFD3_DIV1); /* 389M for OD, 194M for LD/ND*/ in clock_init_late()
191 pcc_clock_sel(4, SDHC1_PCC4_SLOT, PLL3_PFD3_DIV2); /* 194M for OD, 97M for LD/ND */ in clock_init_late()
196 pcc_clock_sel(4, SDHC2_PCC4_SLOT, PLL3_PFD3_DIV2); /* 194M for OD, 97M for LD/ND*/ in clock_init_late()
229 pcc_clock_sel(lpi2c_pcc_clks[i2c_num - 4] & 0xff, in enable_i2c_clk()
267 pcc_clock_sel(3, I3C2_PCC3_SLOT, SOSC_DIV2); in enable_i3c_clk()
382 pcc_clock_sel(5, DSI_PCC5_SLOT, PLL4_PFD3_DIV2); in enable_mipi_dsi_clk()
396 pcc_clock_sel(1, ADC1_PCC1_SLOT, CM33_BUSCLK); in enable_adc1_clk()
468 pcc_clock_sel(5, DCNANO_PCC5_SLOT, PLL4_PFD0_DIV1); in mxs_set_lcdclk()
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| A D | pcc.c | 317 int pcc_clock_sel(int pcc_controller, int pcc_clk_slot, enum cgc_clk src) in pcc_clock_sel() function
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| /u-boot/arch/arm/mach-imx/mx7ulp/ |
| A D | clock.c | 94 pcc_clock_sel(lpi2c_pcc_clks[i2c_num - 4], SCG_FIRC_DIV2_CLK); in enable_i2c_clk()
155 pcc_clock_sel(PER_CLK_USDHC0, SCG_NIC1_CLK); in init_clk_usdhc()
164 pcc_clock_sel(PER_CLK_USDHC1, SCG_NIC1_CLK); in init_clk_usdhc()
203 pcc_clock_sel(PER_CLK_USB0, SCG_NIC1_BUS_CLK); in enable_usboh3_clk()
209 pcc_clock_sel(PER_CLK_USB1, SCG_NIC1_BUS_CLK); in enable_usboh3_clk()
239 pcc_clock_sel(lpuart_pcc_clks[index - 4], clk); in lpuart_set_clk()
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| A D | pcc.c | 112 int pcc_clock_sel(enum pcc_clk clk, enum scg_clk src) in pcc_clock_sel() function
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| /u-boot/arch/arm/include/asm/arch-imx8ulp/ |
| A D | pcc.h | 200 int pcc_clock_sel(int pcc_controller, int pcc_clk_slot, enum cgc_clk src);
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| /u-boot/arch/arm/include/asm/arch-mx7ulp/ |
| A D | pcc.h | 366 int pcc_clock_sel(enum pcc_clk clk, enum scg_clk src);
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