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Searched refs:phydev (Results 1 – 25 of 183) sorted by relevance

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/u-boot/drivers/net/phy/
A Dmarvell.c248 phydev->link = 0; in m88e1xxx_parse_status()
262 phydev->link = 1; in m88e1xxx_parse_status()
264 phydev->link = 0; in m88e1xxx_parse_status()
306 reg = phy_read(phydev, in m88e1111s_config()
319 phy_write(phydev, in m88e1111s_config()
332 phy_write(phydev, in m88e1111s_config()
352 phy_write(phydev, in m88e1111s_config()
364 phy_reset(phydev); in m88e1111s_config()
377 phy_reset(phydev); in m88e1111s_config()
478 phy_reset(phydev); in m88e151x_config()
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A Dbroadcom.c60 phy_reset(phydev); in bcm5461_config()
75 phydev->speed = SPEED_10; in bcm54xx_parse_status()
79 phydev->speed = SPEED_10; in bcm54xx_parse_status()
100 phydev->speed = SPEED_10; in bcm54xx_parse_status()
204 phy_reset(phydev); in bcm_cygnus_config()
206 bcm_cygnus_afe(phydev); in bcm_cygnus_config()
266 phydev->link = 0; in bcm5482_parse_serdes_sr()
273 phydev->link = 1; in bcm5482_parse_serdes_sr()
276 phydev->speed = 10; in bcm5482_parse_serdes_sr()
279 phydev->speed = 100; in bcm5482_parse_serdes_sr()
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A Drealtek.c155 genphy_config_aneg(phydev); in rtl8211x_config()
178 genphy_config_aneg(phydev); in rtl8201f_config()
216 genphy_config_aneg(phydev); in rtl8211e_config()
284 phydev->link = 1; in rtl8211x_parse_status()
290 phydev->link = 0; in rtl8211x_parse_status()
304 phydev->link = 1; in rtl8211x_parse_status()
306 phydev->link = 0; in rtl8211x_parse_status()
324 phydev->speed = SPEED_10; in rtl8211x_parse_status()
339 phydev->link = 1; in rtl8211f_parse_status()
343 phydev->link = 0; in rtl8211f_parse_status()
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A Dnxp-c45-tja11xx.c161 phydev->drv->name); in nxp_c45_get_delays()
176 phydev->drv->name); in nxp_c45_get_delays()
216 phydev->drv->name, ret); in nxp_c45_set_phy_mode()
218 switch (phydev->interface) { in nxp_c45_set_phy_mode()
222 phydev->drv->name); in nxp_c45_set_phy_mode()
234 phydev->drv->name); in nxp_c45_set_phy_mode()
243 nxp_c45_set_delays(phydev); in nxp_c45_set_phy_mode()
248 phydev->drv->name); in nxp_c45_set_phy_mode()
257 phydev->drv->name); in nxp_c45_set_phy_mode()
315 phydev->speed = SPEED_100; in nxp_c45_startup()
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A Dphy.c47 phydev->advertising &= phydev->supported; in genphy_config_advert()
525 phydev->advertising = phydev->drv->features; in phy_probe()
526 phydev->supported = phydev->drv->features; in phy_probe()
528 phydev->mmds = phydev->drv->mmds; in phy_probe()
531 err = phydev->drv->probe(phydev); in phy_probe()
704 if (phydev) in get_phy_device_by_mask()
820 if (phydev->dev && phydev->dev != dev) { in phy_connect_dev()
822 phydev->bus->name, phydev->addr, in phy_connect_dev()
941 return phydev->drv->startup(phydev); in phy_startup()
949 return phydev->drv->config(phydev); in board_phy_config()
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A Dmarvell10g.c254 if (!phydev->is_c45 || in mv3310_probe()
263 dev_warn(phydev->dev, in mv3310_probe()
272 phydev->priv = priv; in mv3310_probe()
294 ret = mv3310_power_down(phydev); in mv3310_probe()
446 err = mv3310_power_up(phydev); in mv3310_config_init()
462 mactype = chip->get_mactype(phydev); in mv3310_config_init()
473 err = mv3310_set_edpd(phydev); in mv3310_config_init()
478 err = mv3310_set_downshift(phydev); in mv3310_config_init()
489 err = mv3310_probe(phydev); in mv3310_config()
491 err = mv3310_config_init(phydev); in mv3310_config()
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A Dmeson-gxl.c31 int meson_gxl_startup(struct phy_device *phydev) in meson_gxl_startup() argument
37 ret = genphy_update_link(phydev); in meson_gxl_startup()
41 if (phydev->autoneg == AUTONEG_ENABLE) { in meson_gxl_startup()
62 wol = phy_read(phydev, MDIO_DEVAD_NONE, 0x15); in meson_gxl_startup()
80 phydev->dev->name); in meson_gxl_startup()
85 phydev->dev->name); in meson_gxl_startup()
87 ret = genphy_restart_aneg(phydev); in meson_gxl_startup()
97 return genphy_parse_link(phydev); in meson_gxl_startup()
103 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_phy_config()
104 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_phy_config()
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A Dmicrel_ksz90x1.c57 phydev->duplex = DUPLEX_FULL; in ksz90xx_startup()
59 phydev->duplex = DUPLEX_HALF; in ksz90xx_startup()
62 phydev->speed = SPEED_1000; in ksz90xx_startup()
64 phydev->speed = SPEED_100; in ksz90xx_startup()
66 phydev->speed = SPEED_10; in ksz90xx_startup()
122 node = phydev->node; in ksz90x1_of_config_group()
268 genphy_config_aneg(phydev); in ksz9021_config()
269 genphy_restart_aneg(phydev); in ksz9021_config()
351 phydev->advertising = phydev->supported = features; in ksz9031_config()
460 phydev->advertising = phydev->supported = features; in ksz9131_config()
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A Dvitesse.c80 genphy_config_aneg(phydev); in vitesse_config()
93 phydev->duplex = DUPLEX_FULL; in vitesse_parse_status()
95 phydev->duplex = DUPLEX_HALF; in vitesse_parse_status()
100 phydev->speed = SPEED_1000; in vitesse_parse_status()
103 phydev->speed = SPEED_100; in vitesse_parse_status()
106 phydev->speed = SPEED_10; in vitesse_parse_status()
129 genphy_config_aneg(phydev); in cis8204_config()
163 ret = vsc8601_add_skew(phydev); in vsc8601_config()
209 genphy_config_aneg(phydev); in vsc8574_config()
264 genphy_config_aneg(phydev); in vsc8514_config()
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A Dnatsemi.c31 genphy_config_aneg(phydev); in dp83630_config()
59 genphy_config_aneg(phydev); in dp838xx_config()
73 phydev->speed = SPEED_1000; in dp83865_parse_status()
77 phydev->speed = SPEED_100; in dp83865_parse_status()
81 phydev->speed = SPEED_10; in dp83865_parse_status()
87 phydev->duplex = DUPLEX_FULL; in dp83865_parse_status()
89 phydev->duplex = DUPLEX_HALF; in dp83865_parse_status()
124 phydev->speed = SPEED_100; in dp83848_parse_status()
126 phydev->speed = SPEED_10; in dp83848_parse_status()
130 phydev->duplex = DUPLEX_FULL; in dp83848_parse_status()
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A Dca_phy.c31 phydev->addr = phy_addr; in __internal_phy_init()
32 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0BC6); in __internal_phy_init()
33 phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x0053); in __internal_phy_init()
34 phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x4003); in __internal_phy_init()
38 phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x1140); in __internal_phy_init()
44 phydev->addr = phy_addr; in __internal_phy_init()
46 data = phy_read(phydev, MDIO_DEVAD_NONE, 19); in __internal_phy_init()
73 val = phy_read(phydev, MDIO_DEVAD_NONE, 27); in __external_phy_init()
75 phy_write(phydev, MDIO_DEVAD_NONE, 27, val); in __external_phy_init()
83 __external_phy_init(phydev, 0); in rtl8211_external_config()
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A Dxilinx_phy.c52 phydev->duplex = DUPLEX_FULL; in xilinxphy_startup()
54 phydev->duplex = DUPLEX_HALF; in xilinxphy_startup()
58 phydev->speed = SPEED_1000; in xilinxphy_startup()
62 phydev->speed = SPEED_100; in xilinxphy_startup()
66 phydev->speed = SPEED_10; in xilinxphy_startup()
81 phydev->speed = SPEED_1000; in xilinxphy_startup()
83 phydev->speed = SPEED_100; in xilinxphy_startup()
85 phydev->speed = SPEED_10; in xilinxphy_startup()
93 phydev->duplex = DUPLEX_FULL; in xilinxphy_startup()
94 phydev->speed = SPEED_1000; in xilinxphy_startup()
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A Dmv88e61xx.c357 priv = phydev->priv; in mv88e61xx_phy_read_indirect()
382 priv = phydev->priv; in mv88e61xx_phy_write_indirect()
486 phydev->link = 0; in mv88e61xx_parse_status()
500 phydev->link = 1; in mv88e61xx_parse_status()
502 phydev->link = 0; in mv88e61xx_parse_status()
975 phydev->priv = priv; in mv88e61xx_probe()
1038 phydev->addr = i; in mv88e61xx_phy_config()
1085 val = mv88e61xx_phy_read(phydev, phydev->addr, PHY_REG_STATUS1); in mv88e61xx_phy_is_connected()
1108 phydev->addr = i; in mv88e61xx_phy_startup()
1120 phydev->link = link; in mv88e61xx_phy_startup()
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A Dnxp-tja11xx.c99 30000, phydev, reg); in tja11xx_check()
128 ret = tja11xx_read(phydev, MII_ECTRL); in tja11xx_wakeup()
177 ret = tja11xx_enable_reg_write(phydev); in tja11xx_config_init()
181 phydev->autoneg = AUTONEG_DISABLE; in tja11xx_config_init()
182 phydev->speed = SPEED_100; in tja11xx_config_init()
183 phydev->duplex = DUPLEX_FULL; in tja11xx_config_init()
215 ret = tja11xx_wakeup(phydev); in tja11xx_config_init()
231 ret = genphy_update_link(phydev); in tja11xx_startup()
235 ret = tja11xx_read(phydev, MII_CFG1); in tja11xx_startup()
239 if (phydev->link) { in tja11xx_startup()
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A Dgeneric_10g.c14 int gen10g_shutdown(struct phy_device *phydev) in gen10g_shutdown() argument
19 int gen10g_startup(struct phy_device *phydev) in gen10g_startup() argument
22 u32 mmd_mask = phydev->mmds & MDIO_DEVS_LINK; in gen10g_startup()
24 phydev->link = 1; in gen10g_startup()
27 phydev->speed = SPEED_10000; in gen10g_startup()
28 phydev->duplex = DUPLEX_FULL; in gen10g_startup()
40 phy_read(phydev, devad, MDIO_STAT1); in gen10g_startup()
43 phydev->link = 0; in gen10g_startup()
68 phydev->mmds = devs1 | (devs2 << 16); in gen10g_discover_mmds()
78 phydev->supported = phydev->advertising = SUPPORTED_10000baseT_Full; in gen10g_config()
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A Datheros.c121 phydev->supported = phydev->drv->features; in ar8021_config()
199 node = phy_get_ofnode(phydev); in ar803x_of_init()
208 phydev->priv = priv; in ar803x_of_init()
265 dev_err(phydev->dev, in ar803x_of_init()
297 dev_err(phydev->dev, in ar803x_of_init()
316 ret = ar803x_of_init(phydev); in ar803x_config()
320 ret = ar803x_delay_config(phydev); in ar803x_config()
324 ret = ar803x_regs_config(phydev); in ar803x_config()
328 phydev->supported = phydev->drv->features; in ar803x_config()
330 genphy_config_aneg(phydev); in ar803x_config()
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A Dmicrel_ksz8xxx.c44 return genphy_config(phydev); in ksz_genconfig_bcastoff()
72 return genphy_config(phydev); in ksz8051_config()
115 return genphy_config(phydev); in ksz8081_config()
144 phydev->bus->write(phydev->bus, smireg_to_phy(smireg), MDIO_DEVAD_NONE, in ksz8895_write_smireg()
151 return phydev->bus->read(phydev->bus, smireg_to_phy(smireg),
160 phydev->link = 1; in ksz8895_config()
161 phydev->duplex = DUPLEX_FULL; in ksz8895_config()
162 phydev->speed = SPEED_100; in ksz8895_config()
202 phydev->link = 1; in ksz886x_config()
203 phydev->duplex = DUPLEX_FULL; in ksz886x_config()
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A Daquantia.c341 ofnode node = phydev->node; in aquantia_dts_config()
487 phydev->supported = phydev->advertising; in aquantia_config()
498 phydev->supported = phydev->advertising; in aquantia_config()
513 phydev->dev->name); in aquantia_config()
517 phydev->dev->name); in aquantia_config()
526 phydev->supported = phydev->advertising; in aquantia_config()
534 phydev->supported = phydev->advertising; in aquantia_config()
545 phydev->drv->name, in aquantia_config()
564 phydev->dev->name); in aquantia_startup()
581 phydev->link = 0; in aquantia_startup()
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A Ddp83869.c134 return phy_read_mmd(phydev, devad, reg); in dp83869_readext()
139 return phy_write_mmd(phydev, devad, reg, val); in dp83869_writeext()
145 (struct dp83869_private *)phydev->priv; in dp83869_config_port_mirroring()
190 node = phy_get_ofnode(phydev); in dp83869_of_init()
211 ret = dp83869_set_strapped_mode(phydev); in dp83869_of_init()
277 if (phy_interface_is_rgmii(phydev)) { in dp83869_configure_rgmii()
411 ret = dp83869_of_init(phydev); in dp83869_config()
420 dp83869_config_port_mirroring(phydev); in dp83869_config()
435 if (phy_interface_is_rgmii(phydev)) { in dp83869_config()
460 genphy_config_aneg(phydev); in dp83869_config()
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A Ddp83867.c132 (struct dp83867_private *)phydev->priv; in dp83867_config_port_mirroring()
158 node = phy_get_ofnode(phydev); in dp83867_of_init()
260 ret = dp83867_of_init(phydev); in dp83867_config()
274 phy_write_mmd(phydev, DP83867_DEVADDR, in dp83867_config()
278 if (phy_interface_is_rgmii(phydev)) { in dp83867_config()
329 phy_write_mmd(phydev, DP83867_DEVADDR, in dp83867_config()
341 cfg2 = phy_read(phydev, phydev->addr, MII_DP83867_CFG2); in dp83867_config()
350 phy_write_mmd(phydev, DP83867_DEVADDR, in dp83867_config()
363 val = phy_read_mmd(phydev, in dp83867_config()
393 genphy_config_aneg(phydev); in dp83867_config()
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A Dteranetics.c16 int tn2020_config(struct phy_device *phydev) in tn2020_config() argument
18 if (phydev->port == PORT_FIBRE) { in tn2020_config()
32 phy_write(phydev, 30, 93, 2); in tn2020_config()
35 phy_write(phydev, 30, 93, 1); in tn2020_config()
60 "address %u\n", phydev->addr); in tn2020_startup()
73 "align.\n", phydev->addr); in tn2020_startup()
76 if (phydev->port != PORT_FIBRE) in tn2020_startup()
77 return gen10g_startup(phydev); in tn2020_startup()
84 phydev->link = 1; in tn2020_startup()
87 phydev->speed = SPEED_10000; in tn2020_startup()
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A Det1011c.c27 static int et1011c_config(struct phy_device *phydev) in et1011c_config() argument
30 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in et1011c_config()
38 return genphy_config_aneg(phydev); in et1011c_config()
49 phydev->duplex = DUPLEX_FULL; in et1011c_parse_status()
51 phydev->duplex = DUPLEX_HALF; in et1011c_parse_status()
56 phydev->speed = SPEED_1000; in et1011c_parse_status()
69 phydev->speed = SPEED_100; in et1011c_parse_status()
72 phydev->speed = SPEED_10; in et1011c_parse_status()
79 static int et1011c_startup(struct phy_device *phydev) in et1011c_startup() argument
83 ret = genphy_update_link(phydev); in et1011c_startup()
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A Ddavicom.c27 static int dm9161_config(struct phy_device *phydev) in dm9161_config() argument
31 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_DM9161_SCR, in dm9161_config()
34 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_DM9161_10BTCSR, in dm9161_config()
37 genphy_config_aneg(phydev); in dm9161_config()
49 phydev->speed = SPEED_100; in dm9161_parse_status()
51 phydev->speed = SPEED_10; in dm9161_parse_status()
54 phydev->duplex = DUPLEX_FULL; in dm9161_parse_status()
56 phydev->duplex = DUPLEX_HALF; in dm9161_parse_status()
61 static int dm9161_startup(struct phy_device *phydev) in dm9161_startup() argument
65 ret = genphy_update_link(phydev); in dm9161_startup()
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A Dadin.c76 static u32 adin_get_reg_value(struct phy_device *phydev, in adin_get_reg_value() argument
84 ofnode node = phy_get_ofnode(phydev); in adin_get_reg_value()
116 ofnode node = phy_get_ofnode(phydev); in adin_get_phy_mode_override()
160 ofnode node = phy_get_ofnode(phydev); in adin_config_clk_out()
181 return adin_ext_write(phydev, ADIN1300_GE_CLK_CFG_REG, in adin_config_clk_out()
192 phydev->interface = phy_mode_override; in adin_config_rgmii_mode()
197 if (!phy_interface_is_rgmii(phydev)) { in adin_config_rgmii_mode()
237 static int adin1300_config(struct phy_device *phydev) in adin1300_config() argument
243 ret = adin_config_clk_out(phydev); in adin1300_config()
247 ret = adin_config_rgmii_mode(phydev); in adin1300_config()
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/u-boot/include/
A Dphy.h105 int (*probe)(struct phy_device *phydev);
109 int (*config)(struct phy_device *phydev);
112 int (*startup)(struct phy_device *phydev);
115 int (*shutdown)(struct phy_device *phydev);
189 int phy_reset(struct phy_device *phydev);
279 if (ofnode_valid(phydev->node)) in phy_get_ofnode()
280 return phydev->node; in phy_get_ofnode()
282 return dev_ofnode(phydev->dev); in phy_get_ofnode()
308 phydev, devaddr, regnum); \
329 int phy_config(struct phy_device *phydev);
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