| /u-boot/arch/arm/dts/ |
| A D | nuvoton-npcm845-pincfg.dtsi | 6 gpio0o_pins: gpio0o-pins {
11 gpio1_pins: gpio1-pins {
16 gpio2_pins: gpio2-pins {
21 gpio2o_pins: gpio2o-pins {
26 gpio3_pins: gpio3-pins {
31 gpio3o_pins: gpio3o-pins {
36 gpio4_pins: gpio4-pins {
41 gpio5_pins: gpio5-pins {
46 gpio6_pins: gpio6-pins {
61 gpio7_pins: gpio7-pins {
[all …]
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| A D | rk3588s-pinctrl.dtsi | 17 rockchip,pins =
32 rockchip,pins =
73 rockchip,pins =
82 rockchip,pins =
93 rockchip,pins =
102 rockchip,pins =
113 rockchip,pins =
122 rockchip,pins =
133 rockchip,pins =
140 rockchip,pins =
[all …]
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| A D | rk3568-pinctrl.dtsi | 17 rockchip,pins =
38 rockchip,pins =
45 rockchip,pins =
52 rockchip,pins =
59 rockchip,pins =
66 rockchip,pins =
73 rockchip,pins =
82 rockchip,pins =
105 rockchip,pins =
130 rockchip,pins =
[all …]
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| A D | nuvoton-npcm8xx-u-boot.dtsi | 497 jm1_pins: jm1-pins {
501 jm2_pins: jm2-pins {
625 bu4_pins: bu4-pins {
629 bu5_pins: bu5-pins {
633 bu6_pins: bu6-pins {
757 r2_pins: r2-pins {
781 lpc_pins: lpc-pins {
789 rg1_pins: rg1-pins {
797 rg2_pins: rg2-pins {
801 ddr_pins: ddr-pins {
[all …]
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| A D | rk3588-pinctrl.dtsi | 17 rockchip,pins =
27 rockchip,pins =
37 rockchip,pins =
54 rockchip,pins =
63 rockchip,pins =
72 rockchip,pins =
79 rockchip,pins =
90 rockchip,pins =
101 rockchip,pins =
110 rockchip,pins =
[all …]
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| A D | nuvoton-npcm750-pincfg-evb.dtsi | 7 pins = "GPIO8/LKGPO1";
12 pins = "GPIO9/LKGPO2";
17 pins = "GPIO10/IOXHLD";
22 pins = "GPIO11/IOXHCK";
27 pins = "GPIO16/LKGPO0";
32 pins = "GPIO24/IOXHDO";
37 pins = "GPIO25/IOXHDI";
42 pins = "GPIO32/nSPI0CS1";
82 pins = "GPIO170/nSMI";
97 pins = "GPIO191";
[all …]
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| A D | tegra124-nyan-big.dts | 134 nvidia,pins = "pb0";
141 nvidia,pins = "pb1";
213 nvidia,pins = "pc7";
219 nvidia,pins = "pg0";
225 nvidia,pins = "pg1";
231 nvidia,pins = "pg2";
237 nvidia,pins = "pg3";
243 nvidia,pins = "pg4";
250 nvidia,pins = "pg5";
257 nvidia,pins = "pg6";
[all …]
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| A D | armada-8040.dtsi | 46 cp0_i2c0_pins: cp0-i2c-pins-0 {
47 marvell,pins = < 37 38 >;
50 cp0_i2c1_pins: cp0-i2c-pins-1 {
51 marvell,pins = < 35 36 >;
64 marvell,pins = <62>;
67 cp0_sdhci_pins: cp0-sdhi-pins-0 {
68 marvell,pins = < 56 57 58 59 60 61 >;
71 cp0_spi0_pins: cp0-spi-pins-0 {
72 marvell,pins = < 13 14 15 16 >;
85 cp1_spi1_pins: cp1-spi-pins-1 {
[all …]
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| A D | nuvoton-common-npcm7xx.dtsi | 622 iox1_pins: iox1-pins {
842 r2_pins: r2-pins {
862 lpc_pins: lpc-pins {
870 rg1_pins: rg1-pins {
878 rg2_pins: rg2-pins {
882 ddr_pins: ddr-pins {
930 sd1_pins: sd1-pins {
958 mmc_pins: mmc-pins {
990 sci_pins: sci-pins {
1010 r1_pins: r1-pins {
[all …]
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| A D | s5p4418-pinctrl.dtsi | 24 pins = "gpioa-29";
31 pins = "gpioa-31";
45 pins = "gpiod-22";
52 pins = "gpiod-23";
66 pins = "gpioc-18";
73 pins = "gpioc-19";
95 pins = "gpiod-3";
102 pins = "gpiod-2";
109 pins = "gpiod-5";
116 pins = "gpiod-4";
[all …]
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| A D | armada-7040.dtsi | 36 cp0_i2c0_pins: cp0-i2c-pins-0 {
37 marvell,pins = < 37 38 >;
40 cp0_i2c1_pins: cp0-i2c-pins-1 {
41 marvell,pins = < 35 36 >;
44 cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
48 cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
54 marvell,pins = <62>;
57 cp0_sdhci_pins: cp0-sdhi-pins-0 {
58 marvell,pins = < 56 57 58 59 60 61 >;
61 cp0_spi0_pins: cp0-spi-pins-0 {
[all …]
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| A D | rv1126-pinctrl.dtsi | 17 rockchip,pins =
23 rockchip,pins =
43 rockchip,pins =
49 rockchip,pins =
57 rockchip,pins =
67 rockchip,pins =
79 rockchip,pins =
85 rockchip,pins =
91 rockchip,pins =
96 rockchip,pins =
[all …]
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| A D | cn9130.dtsi | 44 cp0_i2c0_pins: cp0-i2c-pins-0 {
45 marvell,pins = < 37 38 >;
48 cp0_i2c1_pins: cp0-i2c-pins-1 {
49 marvell,pins = < 35 36 >;
52 cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
56 cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
62 marvell,pins = <62>;
65 cp0_sdhci_pins: cp0-sdhi-pins-0 {
66 marvell,pins = < 56 57 58 59 60 61 >;
69 cp0_spi0_pins: cp0-spi-pins-0 {
[all …]
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| A D | exynos78x0-pinctrl.dtsi | 27 samsung,pins = "gpa3-3";
34 samsung,pins = "gpa0-0";
41 samsung,pins = "gpa2-1";
48 samsung,pins = "gpa2-0";
55 samsung,pins = "gpa1-7";
70 samsung,pins = "gpc0-2";
95 samsung,pins = "gpr0-0";
102 samsung,pins = "gpr0-1";
109 samsung,pins = "gpr0-2";
116 samsung,pins = "gpr0-0";
[all …]
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| A D | rk3308.dtsi | 836 rockchip,pins =
844 rockchip,pins =
852 rockchip,pins =
860 rockchip,pins =
868 rockchip,pins =
876 rockchip,pins =
884 rockchip,pins =
889 rockchip,pins =
894 rockchip,pins =
899 rockchip,pins =
[all …]
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| A D | tegra20-tamonten.dtsi | 28 nvidia,pins = "ata";
36 nvidia,pins = "atc";
45 nvidia,pins = "cdev1";
53 nvidia,pins = "crtp";
57 nvidia,pins = "csus";
61 nvidia,pins = "dap1";
65 nvidia,pins = "dap2";
69 nvidia,pins = "dap3";
85 nvidia,pins = "dtf";
89 nvidia,pins = "gmc";
[all …]
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| A D | fsl-imx8qm-apalis.dts | 43 fsl,pins = <
52 fsl,pins = <
61 fsl,pins = <
70 fsl,pins = <
77 fsl,pins = <
84 fsl,pins = <
91 fsl,pins = <
114 fsl,pins = <
122 fsl,pins = <
129 fsl,pins = <
[all …]
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| A D | imx6ull-colibri.dtsi | 315 fsl,pins = <
324 fsl,pins = <
331 fsl,pins = <
337 fsl,pins = <
343 fsl,pins = <
358 fsl,pins = <
373 fsl,pins = <
379 fsl,pins = <
387 fsl,pins = <
394 fsl,pins = <
[all …]
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| A D | tegra124-apalis.dts | 164 nvidia,pins = "pbb5";
173 nvidia,pins = "pu6";
219 nvidia,pins = "pbb3";
285 nvidia,pins = "pff2";
292 nvidia,pins = "owr";
455 nvidia,pins = "ph0";
462 nvidia,pins = "ph1";
469 nvidia,pins = "ph2";
477 nvidia,pins = "ph3";
592 nvidia,pins = "pg5";
[all …]
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| A D | kirkwood-dnskw.dtsi | 62 marvell,pins = "mpp20";
66 marvell,pins = "mpp21";
70 marvell,pins = "mpp26";
74 marvell,pins = "mpp27";
78 marvell,pins = "mpp28";
82 marvell,pins = "mpp29";
86 marvell,pins = "mpp34";
90 marvell,pins = "mpp35";
94 marvell,pins = "mpp36";
98 marvell,pins = "mpp37";
[all …]
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| A D | bcm2711.dtsi | 732 pins-jtag {
744 pins-mii {
753 pins-mii {
763 pins-pcm {
859 pins-mdio {
874 pins-spi {
883 pins-spi {
893 pins-spi {
902 pins-spi {
911 pins-spi {
[all …]
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| A D | tegra20-ventana.dts | 74 nvidia,pins = "ata";
82 nvidia,pins = "atc";
103 nvidia,pins = "csus";
107 nvidia,pins = "dap1";
111 nvidia,pins = "dap2";
115 nvidia,pins = "dap3";
127 nvidia,pins = "dtf";
131 nvidia,pins = "gmc";
135 nvidia,pins = "gmd";
139 nvidia,pins = "gpu";
[all …]
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| A D | hikey960-pinctrl.dtsi | 29 pinctrl-single,pins = <
38 pinctrl-single,pins = <
44 pinctrl-single,pins = <
50 pinctrl-single,pins = <
58 pinctrl-single,pins = <
66 pinctrl-single,pins = <
72 pinctrl-single,pins = <
79 pinctrl-single,pins = <
86 pinctrl-single,pins = <
92 pinctrl-single,pins = <
[all …]
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| A D | imx6qdl-dhcom-som.dtsi | 459 fsl,pins = <
568 fsl,pins = <
578 fsl,pins = <
587 fsl,pins = <
602 fsl,pins = <
608 fsl,pins = <
615 fsl,pins = <
622 fsl,pins = <
629 fsl,pins = <
636 fsl,pins = <
[all …]
|
| /u-boot/arch/arm/mach-davinci/ |
| A D | pinmux.c | 35 int davinci_configure_pin_mux(const struct pinmux_config *pins, in davinci_configure_pin_mux() argument
42 if (pins[i].field >= PIN_MUX_NUM_FIELDS || in davinci_configure_pin_mux()
43 (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0) in davinci_configure_pin_mux()
49 const int offset = pins[i].field * PIN_MUX_FIELD_SIZE; in davinci_configure_pin_mux()
50 const unsigned int value = pins[i].value << offset; in davinci_configure_pin_mux()
52 const dv_reg *mux = pins[i].mux; in davinci_configure_pin_mux()
83 if (davinci_configure_pin_mux(item[i].pins, in davinci_configure_pin_mux_items()
|