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Searched refs:plat (Results 1 – 25 of 448) sorted by relevance

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/u-boot/drivers/clk/altera/
A Dclk-n5x.c41 CM_REG_WRITEL(plat, val, CLKMGR_CTRL); in clk_write_ctrl()
58 clk_write_ctrl(plat, in clk_basic_init()
112 CM_REG_WRITEL(plat, CM_REG_READL(plat, CLKMGR_MAINPLL_PLLGLOB) | in clk_basic_init()
115 CM_REG_WRITEL(plat, CM_REG_READL(plat, CLKMGR_PERPLL_PLLGLOB) | in clk_basic_init()
120 clk_write_bypass_mainpll(plat, 0); in clk_basic_init()
121 clk_write_bypass_perpll(plat, 0); in clk_basic_init()
124 CM_REG_CLRBITS(plat, CLKMGR_INTRCLR, in clk_basic_init()
133 clk_write_ctrl(plat, in clk_basic_init()
353 reg = CM_REG_READL(plat, ctr_reg); in clk_get_emac_clk_hz()
419 return clk_get_mpu_clk_hz(plat); in socfpga_clk_get_rate()
[all …]
A Dclk-agilex.c44 CM_REG_WRITEL(plat, val, CLKMGR_CTRL); in clk_write_ctrl()
248 clk_write_ctrl(plat, in clk_basic_init()
321 CM_REG_WRITEL(plat, CM_REG_READL(plat, CLKMGR_MAINPLL_PLLGLOB) | in clk_basic_init()
324 CM_REG_WRITEL(plat, CM_REG_READL(plat, CLKMGR_PERPLL_PLLGLOB) | in clk_basic_init()
329 clk_write_bypass_mainpll(plat, 0); in clk_basic_init()
330 clk_write_bypass_perpll(plat, 0); in clk_basic_init()
342 clk_write_ctrl(plat, in clk_basic_init()
540 reg = CM_REG_READL(plat, ctr_reg); in clk_get_emac_clk_hz()
593 return clk_get_mpu_clk_hz(plat); in socfpga_clk_get_rate()
599 return clk_get_l4_mp_clk_hz(plat); in socfpga_clk_get_rate()
[all …]
A Dclk-arria10.c58 if (!plat->ctl_reg) { in socfpga_a10_clk_get_upstream()
63 reg = readl(plat->regs + plat->ctl_reg); in socfpga_a10_clk_get_upstream()
93 clrbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); in socfpga_a10_clk_endisable()
107 setbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); in socfpga_a10_clk_endisable()
136 reg = readl(plat->regs + plat->ctl_reg + 4); /* VCO1 */ in socfpga_a10_clk_get_rate()
144 reg = readl(plat->regs + plat->ctl_reg + 4); /* VCO1 */ in socfpga_a10_clk_get_rate()
152 rate /= plat->fix_div; in socfpga_a10_clk_get_rate()
154 if (plat->fix_div == 1 && plat->ctl_reg) { in socfpga_a10_clk_get_rate()
155 reg = readl(plat->regs + plat->ctl_reg); in socfpga_a10_clk_get_rate()
160 if (plat->div_reg) { in socfpga_a10_clk_get_rate()
[all …]
A Dclk-mem-n5x.c29 inter_val = CM_REG_READL(plat, MEMCLKMGR_STAT) & mask; in clk_mem_wait_for_lock()
48 CM_REG_WRITEL(plat, val, MEMCLKMGR_MEMPLL_BYPASS); in clk_mem_write_bypass_mempll()
57 struct socfpga_mem_clk_plat *plat = dev_get_plat(dev); in clk_mem_basic_init() local
66 CM_REG_SETBITS(plat, MEMCLKMGR_MEMPLL_PLLCTRL, in clk_mem_basic_init()
76 CM_REG_CLRBITS(plat, MEMCLKMGR_MEMPLL_PLLCTRL, in clk_mem_basic_init()
89 CM_REG_WRITEL(plat, CM_REG_READL(plat, MEMCLKMGR_MEMPLL_PLLGLOB) | in socfpga_mem_clk_enable()
94 clk_mem_write_bypass_mempll(plat, 0); in socfpga_mem_clk_enable()
97 CM_REG_CLRBITS(plat, MEMCLKMGR_INTRCLR, in socfpga_mem_clk_enable()
101 CM_REG_CLRBITS(plat, MEMCLKMGR_MEMPLL_EXTCNTRST, in socfpga_mem_clk_enable()
109 struct socfpga_mem_clk_plat *plat = dev_get_plat(dev); in socfpga_mem_clk_of_to_plat() local
[all …]
/u-boot/test/dm/
A Dof_platdata.c36 plat = dev_get_plat(dev); in dm_test_of_plat_props()
37 ut_assert(plat->boolval); in dm_test_of_plat_props()
38 ut_asserteq(1, plat->intval); in dm_test_of_plat_props()
60 plat = dev_get_plat(dev); in dm_test_of_plat_props()
61 ut_assert(!plat->boolval); in dm_test_of_plat_props()
79 plat = dev_get_plat(dev); in dm_test_of_plat_props()
80 ut_assert(!plat->boolval); in dm_test_of_plat_props()
87 plat = dev_get_plat(dev); in dm_test_of_plat_props()
88 ut_assert(!plat->boolval); in dm_test_of_plat_props()
187 plat = dev_get_plat(dev); in dm_test_of_plat_phandle()
[all …]
/u-boot/drivers/power/pmic/
A Di2c_pmic_emul.c35 if (plat->rw_idx + len > plat->buf_size) { in sandbox_i2c_pmic_read_data()
42 (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); in sandbox_i2c_pmic_read_data()
44 memcpy(buffer, plat->reg + plat->rw_idx, len); in sandbox_i2c_pmic_read_data()
61 plat->rw_idx = plat->rw_reg * plat->trans_len; in sandbox_i2c_pmic_write_data()
64 (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); in sandbox_i2c_pmic_write_data()
73 if (plat->rw_idx + len > plat->buf_size) { in sandbox_i2c_pmic_write_data()
78 memcpy(plat->reg + plat->rw_idx, buffer, len); in sandbox_i2c_pmic_write_data()
125 plat->buf_size = plat->reg_count * plat->trans_len; in sandbox_i2c_pmic_probe()
127 plat->reg = calloc(1, plat->buf_size); in sandbox_i2c_pmic_probe()
128 if (!plat->reg) { in sandbox_i2c_pmic_probe()
[all …]
/u-boot/drivers/gpio/
A Ddwapb_gpio.c50 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_input()
59 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
62 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
86 gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank)); in dwapb_gpio_get_function()
100 value = readl(plat->base + GPIO_SWPORT_DR(plat->bank)); in dwapb_gpio_get_value()
102 value = readl(plat->base + GPIO_EXT_PORT(plat->bank)); in dwapb_gpio_get_value()
146 if (!plat) { in gpio_dwapb_probe()
166 if (plat) in gpio_dwapb_bind()
180 plat = devm_kcalloc(dev, 1, sizeof(*plat), GFP_KERNEL); in gpio_dwapb_bind()
181 if (!plat) in gpio_dwapb_bind()
[all …]
A Dmt7621_gpio.c119 if (plat) { in gpio_mediatek_probe()
139 if (plat) in gpio_mediatek_bind()
148 struct mediatek_gpio_plat *plat; in gpio_mediatek_bind() local
151 plat = calloc(1, sizeof(*plat)); in gpio_mediatek_bind()
152 if (!plat) in gpio_mediatek_bind()
154 plat->bank_name[0] = 'P'; in gpio_mediatek_bind()
155 plat->bank_name[1] = 'A' + bank; in gpio_mediatek_bind()
156 plat->bank_name[2] = '\0'; in gpio_mediatek_bind()
157 plat->gpio_count = MTK_BANK_WIDTH; in gpio_mediatek_bind()
158 plat->bank = bank; in gpio_mediatek_bind()
[all …]
A Diproc_gpio.c148 list_add_tail(&range->node, &plat->gpiomap); in iproc_get_gpio_pctrl_mapping()
160 if (!plat->pinctrl_dev) in iproc_gpio_request()
228 plat->base = dev_read_addr_ptr(dev); in iproc_gpio_of_to_plat()
229 if (!plat->base) { in iproc_gpio_of_to_plat()
241 &plat->pinctrl_dev); in iproc_gpio_of_to_plat()
247 INIT_LIST_HEAD(&plat->gpiomap); in iproc_gpio_of_to_plat()
256 plat->name = strdup(name); in iproc_gpio_of_to_plat()
257 if (!plat->name) in iproc_gpio_of_to_plat()
260 uc_priv->gpio_count = plat->ngpios; in iproc_gpio_of_to_plat()
261 uc_priv->bank_name = plat->name; in iproc_gpio_of_to_plat()
[all …]
A Dxilinx_gpio.c45 max_pins = plat->bank_max[bank]; in xilinx_gpio_get_bank_pin()
102 if (plat->bank_output[bank]) { in xilinx_gpio_get_value()
126 if (plat->bank_input[bank]) in xilinx_gpio_get_function()
130 if (plat->bank_output[bank]) in xilinx_gpio_get_function()
155 if (plat->bank_input[bank]) in xilinx_gpio_direction_output()
160 if (!plat->bank_output[bank]) { in xilinx_gpio_direction_output()
180 if (plat->bank_input[bank]) in xilinx_gpio_direction_input()
184 if (plat->bank_output[bank]) in xilinx_gpio_direction_input()
212 if (!plat->bank_max[1]) { in xilinx_gpio_xlate()
256 uc_priv->gpio_count = plat->bank_max[0] + plat->bank_max[1]; in xilinx_gpio_probe()
[all …]
A Dnx_gpio.c48 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_is_check() local
49 const char *bank_name = plat->bank_name; in nx_alive_gpio_is_check()
59 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_direction_input() local
70 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_direction_output() local
85 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_get_value() local
98 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_set_value() local
127 struct nx_gpio_regs *const regs = plat->regs; in nx_gpio_direction_input()
141 struct nx_gpio_regs *const regs = plat->regs; in nx_gpio_direction_output()
159 struct nx_gpio_regs *const regs = plat->regs; in nx_gpio_get_value()
210 uc_priv->gpio_count = plat->gpio_count; in nx_gpio_probe()
[all …]
/u-boot/drivers/rtc/
A Di2c_rtc_emul.c37 old_offset = plat->offset; in sandbox_i2c_rtc_set_offset()
40 plat->offset = offset; in sandbox_i2c_rtc_set_offset()
41 os_set_time_offset(plat->offset); in sandbox_i2c_rtc_set_offset()
51 old_base_time = plat->base_time; in sandbox_i2c_rtc_get_set_base_time()
53 plat->base_time = base_time; in sandbox_i2c_rtc_get_set_base_time()
66 plat->use_system_time = true; in reset_time()
75 if (plat->use_system_time) { in sandbox_i2c_rtc_get()
79 now = plat->base_time; in sandbox_i2c_rtc_get()
93 if (plat->use_system_time) { in sandbox_i2c_rtc_set()
97 now = plat->base_time; in sandbox_i2c_rtc_set()
[all …]
/u-boot/drivers/usb/musb-new/
A Domap2430.c190 plat->plat.power = fdtdec_get_int(fdt, node, "power", -1); in omap2430_musb_of_to_plat()
191 if (plat->plat.power < 0) { in omap2430_musb_of_to_plat()
205 plat->plat.mode = fdtdec_get_int(fdt, node, "mode", -1); in omap2430_musb_of_to_plat()
206 if (plat->plat.mode < 0) { in omap2430_musb_of_to_plat()
212 plat->plat.mode = MUSB_HOST; in omap2430_musb_of_to_plat()
214 plat->plat.mode = MUSB_PERIPHERAL; in omap2430_musb_of_to_plat()
218 plat->plat.config = &plat->musb_config; in omap2430_musb_of_to_plat()
219 plat->plat.platform_ops = &omap2430_ops; in omap2430_musb_of_to_plat()
220 plat->plat.board_data = &plat->otg_board_data; in omap2430_musb_of_to_plat()
240 host->host = musb_init_controller(&plat->plat, in omap2430_musb_probe()
[all …]
/u-boot/drivers/serial/
A Dserial_mt7620.c80 writel(quot, &plat->regs->dl); in _mt7620_serial_setbrg()
102 writel(ch, &plat->regs->thr); in mt7620_serial_putc()
117 return readl(&plat->regs->rbr); in mt7620_serial_getc()
135 plat->regs = (void __iomem *)KSEG1ADDR(plat->dtplat.reg[0]); in mt7620_serial_probe()
136 plat->clock = plat->dtplat.clock_frequency; in mt7620_serial_probe()
140 writel(0, &plat->regs->ier); in mt7620_serial_probe()
161 if (!plat->regs) { in mt7620_serial_of_to_plat()
170 plat->clock = err; in mt7620_serial_of_to_plat()
176 if (!plat->clock) in mt7620_serial_of_to_plat()
179 if (!plat->clock) { in mt7620_serial_of_to_plat()
[all …]
A Dserial_htif.c66 writeq(0, plat->fromhost); in __check_fromhost()
85 while (readq(plat->tohost)) in __set_tohost()
86 __check_fromhost(plat); in __set_tohost()
103 if (plat->console_char < 0) in htif_serial_getc()
104 __check_fromhost(plat); in htif_serial_getc()
107 ch = plat->console_char; in htif_serial_getc()
108 plat->console_char = -1; in htif_serial_getc()
123 if (plat->console_char < 0) in htif_serial_pending()
124 __check_fromhost(plat); in htif_serial_pending()
148 plat->tohost = plat->fromhost + sizeof(u64); in htif_serial_of_to_plat()
[all …]
A Dserial_rockchip.c19 struct ns16550_plat plat; member
29 struct rockchip_uart_plat *plat = dev_get_plat(dev); in rockchip_serial_probe() local
32 plat->plat.base = plat->dtplat.reg[0]; in rockchip_serial_probe()
33 plat->plat.reg_shift = plat->dtplat.reg_shift; in rockchip_serial_probe()
34 plat->plat.clock = plat->dtplat.clock_frequency; in rockchip_serial_probe()
35 plat->plat.fcr = UART_FCR_DEFVAL; in rockchip_serial_probe()
36 dev_set_plat(dev, &plat->plat); in rockchip_serial_probe()
A Dserial_lpuart.c407 if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 || in _lpuart32_serial_init()
408 plat->devtype == DEV_IMXRT) { in _lpuart32_serial_init()
425 if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 || in lpuart_serial_setbrg()
426 plat->devtype == DEV_IMXRT) in lpuart_serial_setbrg()
444 return _lpuart_serial_getc(plat); in lpuart_serial_getc()
514 plat->reg = (void *)addr; in lpuart_serial_of_to_plat()
521 plat->devtype = DEV_LS1021A; in lpuart_serial_of_to_plat()
523 plat->devtype = DEV_MX7ULP; in lpuart_serial_of_to_plat()
525 plat->devtype = DEV_VF610; in lpuart_serial_of_to_plat()
527 plat->devtype = DEV_IMX8; in lpuart_serial_of_to_plat()
[all …]
A Dserial_s5p.c116 struct s5p_uart *const uart = plat->reg; in s5p_serial_setbrg()
128 uclk = get_uart_clk(plat->port_id); in s5p_serial_setbrg()
139 struct s5p_uart *const uart = plat->reg; in s5p_serial_probe()
174 if (plat->reg_width == 4) in s5p_serial_getc()
188 if (plat->reg_width == 4) in s5p_serial_putc()
205 plat->rx_fifo_count_shift; in s5p_serial_pending()
208 plat->tx_fifo_count_shift; in s5p_serial_pending()
222 plat->reg = (struct s5p_uart *)addr; in s5p_serial_of_to_plat()
230 plat->rx_fifo_full = S5L_RX_FIFO_FULL; in s5p_serial_of_to_plat()
233 plat->tx_fifo_full = S5L_TX_FIFO_FULL; in s5p_serial_of_to_plat()
[all …]
/u-boot/drivers/usb/host/
A Ddwc3-sti-glue.c49 val = readl(plat->syscfg_base + plat->syscfg_offset); in sti_dwc3_glue_drd_init()
53 switch (plat->mode) { in sti_dwc3_glue_drd_init()
76 writel(val, plat->syscfg_base + plat->syscfg_offset); in sti_dwc3_glue_drd_init()
119 plat->glue_base = reg[0]; in sti_dwc3_glue_of_to_plat()
120 plat->syscfg_offset = reg[2]; in sti_dwc3_glue_of_to_plat()
170 plat->mode = usb_get_dr_mode(dwc3_node); in sti_dwc3_glue_bind()
171 if (plat->mode == USB_DR_MODE_UNKNOWN) in sti_dwc3_glue_bind()
173 plat->mode = USB_DR_MODE_HOST; in sti_dwc3_glue_bind()
196 ret = sti_dwc3_glue_drd_init(plat); in sti_dwc3_glue_probe()
200 sti_dwc3_glue_init(plat); in sti_dwc3_glue_probe()
[all …]
/u-boot/drivers/power/regulator/
A Daxp_regulator.c41 sel &= plat->volt_mask; in axp_regulator_get_value()
44 if (plat->table) { in axp_regulator_get_value()
48 sel = plat->split + (sel - plat->split) * 2; in axp_regulator_get_value()
49 mV = plat->min_mV + sel * plat->step_mV; in axp_regulator_get_value()
63 if (mV < plat->min_mV || mV > plat->max_mV) in axp_regulator_set_value()
68 if (plat->table) { in axp_regulator_set_value()
77 sel = (mV - plat->min_mV) / plat->step_mV; in axp_regulator_set_value()
79 sel = plat->split + (sel - plat->split) / 2; in axp_regulator_set_value()
95 return (reg & plat->enable_mask) == plat->enable_mask; in axp_regulator_get_enable()
289 for (plat = axp_regulators[id]; plat && plat->name; plat++) in axp_regulator_bind()
[all …]
/u-boot/drivers/cpu/
A Dimx8_cpu.c91 plat->cpu_rsrc = SC_R_A35; in set_core_data()
92 plat->name = "A35"; in set_core_data()
94 plat->cpu_rsrc = SC_R_A53; in set_core_data()
95 plat->name = "A53"; in set_core_data()
97 plat->cpu_rsrc = SC_R_A72; in set_core_data()
98 plat->name = "A72"; in set_core_data()
100 plat->name = "A55"; in set_core_data()
102 plat->cpu_rsrc = SC_R_A53; in set_core_data()
103 plat->name = "?"; in set_core_data()
155 plat->type, plat->rev, plat->name, plat->freq_mhz); in cpu_imx_get_desc()
[all …]
A Dimx9_cpu.c56 struct cpu_imx_plat *plat = dev_get_plat(dev); in set_core_data() local
59 plat->name = "A35"; in set_core_data()
61 plat->name = "?"; in set_core_data()
71 if (plat->cpu_rsrc == SC_R_A72) in cpu_imx_get_temp()
101 plat->type, plat->rev, plat->name, plat->freq_mhz); in cpu_imx_get_desc()
104 temp = cpu_imx_get_temp(plat); in cpu_imx_get_desc()
122 info->cpu_freq = plat->freq_mhz * 1000; in cpu_imx_get_info()
203 plat->cpurev = cpurev; in imx9_cpu_probe()
204 plat->rev = get_imx9_rev(cpurev & 0xFFF); in imx9_cpu_probe()
207 plat->mpidr = dev_read_addr(dev); in imx9_cpu_probe()
[all …]
/u-boot/drivers/video/
A Dsandbox_sdl.c29 struct sandbox_sdl_plat *plat = dev_get_plat(dev); in sandbox_sdl_probe() local
34 ret = sandbox_sdl_init_display(plat->xres, plat->yres, plat->bpix, in sandbox_sdl_probe()
40 uc_priv->xsize = plat->xres; in sandbox_sdl_probe()
41 uc_priv->ysize = plat->yres; in sandbox_sdl_probe()
42 uc_priv->bpix = plat->bpix; in sandbox_sdl_probe()
43 uc_priv->rot = plat->rot; in sandbox_sdl_probe()
45 uc_priv->font_size = plat->font_size; in sandbox_sdl_probe()
55 struct sandbox_sdl_plat *plat = dev_get_plat(dev); in set_bpp() local
57 plat->bpix = l2bpp; in set_bpp()
59 uc_plat->size = plat->xres * plat->yres * VNBYTES(plat->bpix); in set_bpp()
[all …]
/u-boot/drivers/mmc/
A Dam654_sdhci.c238 am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode]); in am654_sdhci_setup_delay_chain()
288 plat->clkbuf_sel); in am654_sdhci_set_ios_post()
303 if (plat->flags & DLL_CALIB) { in am654_sdhci_init()
322 if (plat->non_removable) in am654_sdhci_init()
352 am654_sdhci_init(plat); in am654_sdhci_deferred_probe()
453 plat->clkbuf_sel); in j721e_4bit_sdhci_set_ios_post()
497 &plat->otap_del_sel[0]); in sdhci_am654_get_otap_delay()
506 &plat->otap_del_sel[i]); in sdhci_am654_get_otap_delay()
551 host->mmc = &plat->mmc; in am654_sdhci_probe()
640 plat->flags = drv_data->flags; in am654_sdhci_bind()
[all …]
A Dstm32_sdmmc2.c526 writel(plat->pwr_reg_msk, plat->base + SDMMC_POWER); in stm32_sdmmc2_reset()
541 stm32_sdmmc2_reset(plat); in stm32_sdmmc2_pwrcycle()
581 if (plat->mmc.vqmmc_supply && !plat->vqmmc_enabled) { in stm32_sdmmc2_pwron()
585 plat->vqmmc_enabled = true; in stm32_sdmmc2_pwron()
603 stm32_sdmmc2_pwrcycle(plat); in stm32_sdmmc2_set_ios()
605 stm32_sdmmc2_pwron(plat); in stm32_sdmmc2_set_ios()
767 ret = clk_enable(&plat->clk); in stm32_sdmmc2_probe()
769 clk_free(&plat->clk); in stm32_sdmmc2_probe()
773 upriv->mmc = &plat->mmc; in stm32_sdmmc2_probe()
779 stm32_sdmmc2_reset(plat); in stm32_sdmmc2_probe()
[all …]

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