Searched refs:pllm (Results 1 – 9 of 9) sorted by relevance
| /u-boot/drivers/clk/ti/ |
| A D | clk-k3-pll.c | 85 u32 pllm; in ti_pll_clk_get_rate() local
95 pllm = readl(pll->reg + PLL_16FFT_FREQ_CTRL0); in ti_pll_clk_get_rate()
101 current_freq = parent_freq * pllm / plld; in ti_pll_clk_get_rate()
122 unsigned long pllm; in ti_pll_clk_set_rate() local
142 PLL_16FFT_DIV_CTRL_REF_DIV_MASK, &pllm, &plld); in ti_pll_clk_set_rate()
143 if (pllm / plld <= PLL_16FFT_FREQ_CTRL0_FB_DIV_INT_MASK) in ti_pll_clk_set_rate()
158 __func__, (u32)rate, (u32)parent_freq, (u32)plld, (u32)pllm); in ti_pll_clk_set_rate()
162 pllfm = pllm % plld; in ti_pll_clk_set_rate()
168 pllm /= plld; in ti_pll_clk_set_rate()
177 writel(pllm, pll->reg + PLL_16FFT_FREQ_CTRL0); in ti_pll_clk_set_rate()
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| /u-boot/arch/arm/mach-davinci/ |
| A D | cpu.c | 40 int pllm; in clk_get() local
63 pllm = readl(pll_base + PLLC_PLLM) + 1; in clk_get()
66 pll_out *= pllm; in clk_get()
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| A D | da850_lowlevel.c | 90 writel(pllmult, ®->pllm); in da850_pll_init()
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| /u-boot/arch/arm/mach-davinci/include/mach/ |
| A D | dm365_lowlevel.h | 17 int dm365_pll2_init(unsigned long pllm, unsigned long prediv);
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| A D | pll_defs.h | 18 unsigned int pllm; /* 0x110 */ member
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| A D | hardware.h | 204 dv_reg pllm; member
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| /u-boot/arch/arm/mach-keystone/ |
| A D | clock.c | 63 u32 pllm, plld, bwadj; in configure_mult_div() local
65 pllm = data->pll_m - 1; in configure_mult_div()
70 pllctl_reg_write(data->pll, mult, pllm & PLLM_MULT_LO_MASK); in configure_mult_div()
74 pllm << CFG_PLLCTL0_PLLM_SHIFT); in configure_mult_div()
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| /u-boot/drivers/clk/stm32/ |
| A D | clk-stm32f.c | 281 u16 pllm, pllsain; in stm32_clk_get_pllsai_vco_rate() local
283 pllm = (readl(®s->pllcfgr) & RCC_PLLCFGR_PLLM_MASK); in stm32_clk_get_pllsai_vco_rate()
287 return ((priv->hse_rate / pllm) * pllsain); in stm32_clk_get_pllsai_vco_rate()
404 u16 pllm, plln, pllp, pllq; in stm32_clk_get_rate() local
408 pllm = (readl(®s->pllcfgr) & RCC_PLLCFGR_PLLM_MASK); in stm32_clk_get_rate()
415 vco = (priv->hse_rate / pllm) * plln; in stm32_clk_get_rate()
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| /u-boot/drivers/clk/altera/ |
| A D | clk-agilex.c | 202 static u32 calc_vocalib_pll(u32 pllm, u32 pllglob) in calc_vocalib_pll() argument
206 mdiv = pllm & CLKMGR_PLLM_MDIV_MASK; in calc_vocalib_pll()
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