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/u-boot/arch/powerpc/dts/
A Dt1024si-post.dtsi3 * T1024 Silicon/SoC Device Tree Source (post include)
10 #include "t1023si-post.dtsi"
A Dp1010rdb-pa.dts17 /include/ "p1010si-post.dtsi"
A Dp1010rdb-pb.dts17 /include/ "p1010si-post.dtsi"
A Dp1010rdb-pa_36b.dts17 /include/ "p1010si-post.dtsi"
A Dp1010rdb-pb_36b.dts17 /include/ "p1010si-post.dtsi"
A Dmpc8548cds.dts29 /include/ "mpc8548-post.dtsi"
A Dmpc8548cds_36b.dts29 /include/ "mpc8548-post.dtsi"
A Dmpc8548-post.dtsi3 * MPC8548 Silicon/SoC Device Tree Source (post include)
/u-boot/board/google/chromebook_coral/
A DKconfig29 bool "Enable early post to Chrome OS EC"
31 Allow post codes to be sent to the Chroem OS EC early during boot,
33 With this option enabled, the EC console can be used to watch post
/u-boot/include/
A DACEX1K.h32 Altera_post_fn post; member
43 Altera_post_fn post; member
A Dspartan2.h26 xilinx_post_fn post; member
37 xilinx_post_fn post; member
A Dspartan3.h26 xilinx_post_fn post; member
37 xilinx_post_fn post; member
/u-boot/drivers/fpga/
A Dspartan2.c122 fn->abort, fn->post); in spartan2_sp_load()
226 if (*fn->post) in spartan2_sp_load()
227 (*fn->post) (cookie); in spartan2_sp_load()
416 if (*fn->post) in spartan2_ss_load()
417 (*fn->post) (cookie); in spartan2_ss_load()
A Dspartan3.c127 fn->abort, fn->post); in spartan3_sp_load()
233 if (*fn->post) in spartan3_sp_load()
234 (*fn->post) (cookie); in spartan3_sp_load()
435 if (*fn->post) in spartan3_ss_load()
436 (*fn->post) (cookie); in spartan3_ss_load()
A Dcyclon2.c185 if (*fn->post) in CYC2_ps_load()
186 (*fn->post) (cookie); in CYC2_ps_load()
A DstratixII.c182 if (fns->post) { in StratixII_ps_fpp_load()
183 if ((ret_val = fns->post (cookie)) < 0) { in StratixII_ps_fpp_load()
/u-boot/post/
A DMakefile6 obj-y += post.o
/u-boot/arch/arm/dts/
A Dimx8mp-evk-u-boot.dtsi137 reset-post-delay-us = <100000>;
143 phy-reset-post-delay = <100>;
A Dimx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi136 reset-post-delay-us = <100000>;
142 phy-reset-post-delay = <100>;
A Dimx8mm-venice-gw700x-u-boot.dtsi11 phy-reset-post-delay = <300>;
A Dimx6qdl-dhcom-u-boot.dtsi21 phy-reset-post-delay = <10>;
A Dimx8mm-venice-gw7904-u-boot.dtsi29 phy-reset-post-delay = <300>;
/u-boot/doc/device-tree-bindings/input/
A Dhid-over-i2c.txt30 - post-power-on-delay-ms
33 - post-power-on-delay-ms: time required by the device after enabling its regulators
/u-boot/board/google/chromebook_link/
A DKconfig32 bool "Enable early post to Chrome OS EC"
/u-boot/arch/riscv/lib/
A Dinterrupts.c162 u32 post = *(u32 *)post_addr; in handle_trap() local
169 if (pre == 0x01f01013 && post == 0x40705013) { in handle_trap()

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