Home
last modified time | relevance | path

Searched refs:pulse (Results 1 – 25 of 43) sorted by relevance

12

/u-boot/board/atmel/at91sam9261ek/
A Dat91sam9261ek.c55 &smc->cs[3].pulse); in at91sam9261ek_nand_hw_init()
64 &smc->cs[3].pulse); in at91sam9261ek_nand_hw_init()
103 &smc->cs[2].pulse); in at91sam9261ek_dm9000_hw_init()
117 &smc->cs[2].pulse); in at91sam9261ek_dm9000_hw_init()
/u-boot/drivers/mfd/
A Datmel-smc.c195 conf->pulse &= ~GENMASK(shift + 7, shift); in atmel_smc_cs_conf_set_pulse()
196 conf->pulse |= val << shift; in atmel_smc_cs_conf_set_pulse()
253 regmap_write(regmap, ATMEL_SMC_PULSE(cs), conf->pulse); in atmel_smc_cs_conf_apply()
274 regmap_write(regmap, ATMEL_HSMC_PULSE(layout, cs), conf->pulse); in atmel_hsmc_cs_conf_apply()
294 regmap_read(regmap, ATMEL_SMC_PULSE(cs), &conf->pulse); in atmel_smc_cs_conf_get()
315 regmap_read(regmap, ATMEL_HSMC_PULSE(layout, cs), &conf->pulse); in atmel_hsmc_cs_conf_get()
/u-boot/doc/device-tree-bindings/video/
A Ddisplay-timing.txt26 - hsync-active: hsync pulse is active low/high/ignored
27 - vsync-active: vsync pulse is active low/high/ignored
28 - de-active: data-enable pulse is active low/high/ignored
A Ddisplaymode.txt16 - hsync-active-high (bool): Hsync pulse is active high
17 - vsync-active-high (bool): Vsync pulse is active high
/u-boot/arch/arm/include/asm/arch-lpc32xx/
A Dwdt.h19 u32 pulse; /* Reset Pulse Length Register */ member
/u-boot/doc/device-tree-bindings/sound/
A Dda7219.txt47 - dlg,micbias-pulse-lvl : Mic bias higher voltage pulse level (mV).
49 - dlg,micbias-pulse-time : Mic bias higher voltage pulse duration (ms)
/u-boot/arch/arm/mach-lpc32xx/
A Dcpu.c26 writel(13000, &wdt->pulse); in reset_cpu()
/u-boot/board/esd/meesc/
A Dmeesc.c76 &smc->cs[3].pulse); in meesc_nand_hw_init()
119 &smc1->cs[0].pulse); in meesc_ethercat_hw_init()
/u-boot/board/atmel/at91sam9260ek/
A Dat91sam9260ek.c45 &smc->cs[3].pulse); in at91sam9260ek_nand_hw_init()
/u-boot/arch/arm/mach-at91/include/mach/
A Dat91sam9_smc.h30 u32 pulse; /* 0x04 SMC Pulse Register */ member
A Dsama5d2_smc.h21 u32 pulse; /* 0x604 SMC Pulse Register */ member
A Dsama5d3_smc.h21 u32 pulse; /* 0x604 SMC Pulse Register */ member
/u-boot/drivers/mtd/nand/raw/atmel/
A Dpmecc.h55 u32 pulse; member
/u-boot/board/atmel/at91sam9rlek/
A Dat91sam9rlek.c51 &smc->cs[3].pulse); in at91sam9rlek_nand_hw_init()
/u-boot/board/atmel/sama5d3xek/
A Dsama5d3xek.c43 &smc->cs[3].pulse); in sama5d3xek_nand_hw_init()
75 &smc->cs[0].pulse); in sama5d3xek_nor_hw_init()
/u-boot/board/atmel/at91sam9263ek/
A Dat91sam9263ek.c54 &smc->cs[3].pulse); in at91sam9263ek_nand_hw_init()
/u-boot/board/calao/usb_a9263/
A Dusb_a9263.c43 &smc->cs[3].pulse); in usb_a9263_nand_hw_init()
/u-boot/board/ronetix/pm9263/
A Dpm9263.c49 &smc->cs[3].pulse); in pm9263_nand_hw_init()
/u-boot/board/egnite/ethernut5/
A Dethernut5.c111 &smc->cs[3].pulse); in ethernut5_nand_hw_init()
/u-boot/board/ronetix/pm9261/
A Dpm9261.c50 &smc->cs[3].pulse); in pm9261_nand_hw_init()
/u-boot/doc/device-tree-bindings/watchdog/
A Dgpio-wdt.txt12 - level: Maintain a constant high/low level, and trigger a short pulse when
/u-boot/drivers/pwm/
A DKconfig2 bool "Enable support for pulse-width modulation devices (PWM)"
5 A pulse-width modulator emits a pulse of varying width and provides
/u-boot/arch/arm/dts/
A Dstih410-b2260.dts198 st,i2c-min-scl-pulse-width-us = <0>;
199 st,i2c-min-sda-pulse-width-us = <5>;
/u-boot/board/atmel/sama5d2_ptc_ek/
A Dsama5d2_ptc_ek.c48 &smc->cs[3].pulse); in board_nand_hw_init()
/u-boot/doc/device-tree-bindings/timer/
A Datcpit100_timer.txt7 used as pulse width modulators (PWM) as well as simple timers.

Completed in 36 milliseconds

12