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Searched refs:r2 (Results 1 – 25 of 102) sorted by relevance

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/u-boot/arch/arm/cpu/arm926ejs/mxs/
A Dstart.S64 mrc p15, 0, r2, c1, c0, 0
65 push {r2}
68 mrs r2, cpsr
69 push {r2}
70 bic r2, r2, #0x1f
71 orr r2, r2, #0xd3
72 msr cpsr, r2
77 pop {r2}
78 msr cpsr,r2
84 pop {r2}
[all …]
/u-boot/arch/arm/lib/
A Dmemset.S30 cmp r2, #16
42 2: subs r2, r2, #64
52 tst r2, #32
55 tst r2, #16
74 cmp r2, #96
80 sub r2, r2, r8
88 3: subs r2, r2, #64
104 tst r2, #4
113 tst r2, #1
117 6: subs r2, r2, #4 @ 1 do we have enough
[all …]
A Drelocate.S53 mrc p15, 0, r2, c1, c0, 0 /* V bit (bit[13]) in CP15 c1 */
54 ands r2, r2, #(1 << 13)
57 ldmia r0!, {r2-r8,r10}
58 stmia r1!, {r2-r8,r10}
59 ldmia r0!, {r2-r8,r10}
60 stmia r1!, {r2-r8,r10}
88 ldr r2, _image_copy_end_ofs
89 add r2, r3 /* r2 <- Run &__image_copy_end */
93 cmp r1, r2 /* until source end address [r2] */
100 add r2, r1, r3 /* r2 <- Run &__rel_dyn_start */
[all …]
A Ddebug.S43 printhex: adr r2, hexbuf
44 add r3, r2, r1
53 teq r3, r2
55 mov r0, r2
66 addruart_current r3, r1, r2
68 1: waituart r2, r3
70 busyuart r2, r3
82 addruart_current r3, r1, r2
108 mov r2, #0
109 str r2, [r0]
[all …]
A Dmemcpy.S66 subs r2, r2, #4
74 1: subs r2, r2, #(28)
83 CALGN( subs r2, r2, r3 ) @ C gets set
87 2: PLD( subs r2, r2, #96 )
95 subs r2, r2, #32
142 8: movs r2, r2, lsl #31
160 subs r2, r2, ip
175 subs r2, r2, #28
181 CALGN( subcc r2, r2, ip )
187 PLD( subs r2, r2, #96 )
[all …]
A Dashldi3.S21 subs r3, r2, #32
22 rsb ip, r2, #32
23 movmi ah, ah, lsl r2
28 mov al, al, lsl r2
A Dashrdi3.S21 subs r3, r2, #32
22 rsb ip, r2, #32
23 movmi al, al, lsr r2
28 mov ah, ah, asr r2
A Dlshrdi3.S21 subs r3, r2, #32
22 rsb ip, r2, #32
23 movmi al, al, lsr r2
28 mov ah, ah, lsr r2
A Dlib1funcs.S198 subs r2, r1, #1
203 tst r1, r2
208 mov r0, r2
215 12: ARM_DIV2_ORDER r1, r2
217 mov r0, r0, lsr r2
234 andeq r0, r0, r2
278 12: ARM_DIV2_ORDER r1, r2
281 mov r0, r3, lsr r2
303 andeq r0, r0, r2
324 mul r3, r0, r2
[all …]
/u-boot/arch/arm/cpu/armv7/ls102xa/
A Dpsci.S76 addne r2, r2, #8
126 mov r1, r2
127 mov r2, r3
137 rev r2, r2
138 lsr r2, r2, r1
139 ands r2, r2, #1
178 orr r2, r2, r6
226 rev r2, r2
227 lsr r2, r2, r1
228 ands r2, r2, #1
[all …]
/u-boot/arch/arm/mach-rmobile/
A Dlowlevel_init.S27 mov r2, #0x0
28 str r2, [r1]
29 mov r2, #0xF0
31 str r2, [r1]
33 mov r2, #0x1
34 str r2, [r1]
40 ldr r2, [r1, #0xC]
41 str r2, [r1, #0x10]
44 ldr r2, [r0]
45 cmp r2, #0
[all …]
/u-boot/board/armltd/integrator/
A Dlowlevel_init.S50 and r2,r2,#CMMASK_MAP_SIMPLE
55 and r2,r2,#CMMASK_TCRAM_DISABLE
61 and r2,r2,#CMMASK_LE
65 orr r2,r2,#CMMASK_CMxx6_COMMON
73 and r3,r1,r2
74 cmp r3,r2
82 orr r1,r1,r2
155 orr r2, r1, r2, ASL#12 /* OR in column address lines */
156 orr r3, r2, r3, ASL#16 /* OR in number of banks */
179 add r2, r0, #64 /* r2 <- past vectors */
[all …]
/u-boot/arch/nios2/cpu/
A Dstart.S109 movhi r2, %hi(debug_uart_init@h)
110 ori r2, r2, %lo(debug_uart_init@h)
111 callr r2
117 ori r2, r2, %lo(board_init_f_alloc_reserve@h)
118 callr r2
119 mov sp, r2
122 ori r2, r2, %lo(board_init_f_init_reserve@h)
123 callr r2
130 movhi r2, %hi(board_init_f@h)
131 ori r2, r2, %lo(board_init_f@h)
[all …]
/u-boot/board/freescale/mx7ulp_evk/
A Dplugin.S10 ldr r2, =0x403f0000
12 str r3, [r2, #0xdc]
14 ldr r2, =0x403e0000
16 str r3, [r2, #0x40]
18 str r3, [r2, #0x500]
21 str r3, [r2, #0x50c]
23 str r3, [r2, #0x508]
25 str r3, [r2, #0x510]
27 str r3, [r2, #0x514]
29 str r3, [r2, #0x500]
[all …]
/u-boot/arch/arm/mach-s5pc1xx/
A Dreset.S15 ldr r2, [r1]
17 and r4, r2, r4
22 ldr r2, =0xC100
26 mov r2, #1
28 str r2, [r1]
/u-boot/arch/arm/mach-imx/mx7/
A Dpsci-suspend.S23 and r2, r1, r0, lsr #13
28 add r2, r2, #1 @ NumSets
36 sub r2, r2, #1 @ NumSets--
41 mov r6, r2, lsl r0
45 cmp r2, #0
/u-boot/arch/arm/mach-at91/arm926ejs/
A Dlowlevel_init.S39 ldr r2, =SMRDATA1
41 add r2, r2, r5
48 cmp r2, r0
68 ldr r2, =(AT91_ASM_PMC_SR)
76 ldr r3, [r2]
94 ldr r3, [r2]
114 ldr r3, [r2]
125 ldr r3, [r2]
141 ldr r2, =SMRDATA2
143 add r2, r2, r5
[all …]
/u-boot/board/freescale/ls1021aqds/
A Dpsci.S25 ldrb r2, [r1, #QIXIS_PWR_CTL]
26 orr r2, r2, #QIXIS_PWR_CTL_POWEROFF
27 strb r2, [r1, #QIXIS_PWR_CTL]
/u-boot/board/samsung/goni/
A Dlowlevel_init.S33 ldr r2, =S5PC110_PRO_ID
34 ldr r0, [r2]
156 orr r1, r1, r2
211 orr r1, r1, r2
271 bic r1, r1, r2
274 orr r1, r1, r2
278 orr r1, r1, r2
344 ldr r1, [r2]
346 str r1, [r2]
377 mov r2, #0x10000
[all …]
/u-boot/arch/arm/mach-mediatek/mt7629/
A Dlowlevel_init.S63 ldr r2, =GIC_CPU_BASE
65 str r1, [r2, #4]
67 str r1, [r2, #0]
69 ldr r1, [r2]
71 str r1, [r2]
92 ldr r2, [r0]
93 cmp r2, r1
/u-boot/arch/arm/mach-omap2/omap3/
A Dlowlevel_init.S89 str r2, [r5]
91 ldr r2, pll_div_val4
92 str r2, [r5]
94 ldr r2, pll_div_val5
95 str r2, [r5]
101 str r2, [r5]
104 str r2, [r5]
107 str r2, [r5]
109 ldr r2, [r5]
110 orr r2, r2, #0x3 /* up gpmc divider */
[all …]
/u-boot/arch/arm/mach-at91/arm920t/
A Dlowlevel_init.S51 ldr r2, =SMRDATAE
52 sub r2, r2, r1
59 cmp r2, r0
70 ldr r2, =SMRDATA1E
71 sub r2, r2, r1
78 cmp r2, r0
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dstart.S229 ori r2, r2, L2CSR0_L2E@l
236 ori r2, r2, (L2CSR0_L2FL)@l
249 ori r2, r2, L2CSR0_L2E@l
479 andc r2, r2, r3
480 or r2, r2, r1
485 rlwinm r2, r2, 0, ~MAS2_I
486 ori r2, r2, MAS2_G
492 andc r2, r2, r3
493 or r2, r2, r1
691 ori r2, r2, CCSRAR_C@l
[all …]
/u-boot/arch/arm/mach-orion5x/
A Dlowlevel_init.S75 ldr r2, =ORION5X_REGS_PHY_BASE
81 str r2, [r3, #0x80]
84 add r3, r2, #0x01000
91 add r3, r2, #0x31000
98 add r3, r2, #0x01000
271 add r3, r2, #0x01000
273 ldr r2, [r3, #0x484]
274 orr r2, r2, r0
275 str r2, [r3, #0x484]
/u-boot/arch/arm/mach-uniphier/arm32/
A Dpsci_smp.S29 ldr r2, =uniphier_smp_booted
31 str r0, [r2, r1, lsl #2]
33 ldr r2, =uniphier_psci_holding_pen_release
34 pen: ldr r0, [r2]

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