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Searched refs:ram_size (Results 1 – 25 of 346) sorted by relevance

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/u-boot/test/lib/
A Dlmb.c27 if (ram_size) { in check_lmb()
318 ASSERT_LMB(&lmb, ram, ram_size, 1, ram + ram_size - alloc_size_aligned, in test_noreserved()
324 ASSERT_LMB(&lmb, ram, ram_size, 1, ram + ram_size - in test_noreserved()
328 ASSERT_LMB(&lmb, ram, ram_size, 2, ram + ram_size - in test_noreserved()
335 ASSERT_LMB(&lmb, ram, ram_size, 1, ram + ram_size - alloc_size_aligned, in test_noreserved()
344 ASSERT_LMB(&lmb, ram, ram_size, 1, ram + ram_size - alloc_size_aligned, in test_noreserved()
403 ASSERT_LMB(&lmb, ram, ram_size, 1, a, ram_size - 4, in lib_test_lmb_at_0()
410 ASSERT_LMB(&lmb, ram, ram_size, 1, a, ram_size - 4, in lib_test_lmb_at_0()
415 ASSERT_LMB(&lmb, ram, ram_size, 1, a, ram_size - 4, in lib_test_lmb_at_0()
517 ASSERT_LMB(&lmb, ram, ram_size, 1, ram, ram_size, in test_alloc_addr()
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/u-boot/board/hpe/gxp/
A Dgxp_board.c32 gd->ram_size = SZ_128M + SZ_64M + SZ_32M + SZ_16M + SZ_8M; in dram_init()
35 gd->ram_size = SZ_256M + SZ_128M + SZ_64M + SZ_32M + SZ_16M; in dram_init()
41 gd->ram_size = SZ_128M + SZ_64M; in dram_init()
44 gd->ram_size = SZ_256M + SZ_128M; in dram_init()
51 gd->ram_size = SZ_128M + SZ_64M + SZ_32M; in dram_init()
54 gd->ram_size = SZ_256M + SZ_128M + SZ_64M; in dram_init()
61 gd->ram_size = SZ_256M + SZ_128M + SZ_32M + SZ_16M + SZ_2M; in dram_init()
64 gd->ram_size = SZ_256M + SZ_64M; in dram_init()
69 gd->ram_size = SZ_256M + SZ_128M; in dram_init()
/u-boot/board/nuvoton/poleg_evb/
A Dpoleg_evb.c28 gd->ram_size = 0x08000000; /* 128 MB. */ in dram_init()
31 gd->ram_size = 0x10000000; /* 256 MB. */ in dram_init()
34 gd->ram_size = 0x20000000; /* 512 MB. */ in dram_init()
37 gd->ram_size = 0x40000000; /* 1024 MB. */ in dram_init()
40 gd->ram_size = 0x80000000; /* 2048 MB. */ in dram_init()
/u-boot/board/freescale/ls1012afrdm/
A Dls1012afrdm.c94 gd->ram_size = tfa_get_dram_size(); in dram_init()
96 if (!gd->ram_size) { in dram_init()
101 gd->ram_size = SYS_SDRAM_SIZE_1024; in dram_init()
103 gd->ram_size = SYS_SDRAM_SIZE_512; in dram_init()
105 gd->ram_size = CFG_SYS_SDRAM_SIZE; in dram_init()
137 gd->ram_size = SYS_SDRAM_SIZE_1024; in dram_init()
139 gd->ram_size = SYS_SDRAM_SIZE_512; in dram_init()
142 gd->ram_size = CFG_SYS_SDRAM_SIZE; in dram_init()
/u-boot/board/compulab/cm_t43/
A Dspl.c119 unsigned long ram_size; in sdram_init() local
122 ram_size = get_ram_size((long int *)CFG_SYS_SDRAM_BASE, 0x80000000); in sdram_init()
123 if (ram_size == 0x80000000 || in sdram_init()
124 ram_size == 0x40000000 || in sdram_init()
125 ram_size == 0x20000000) in sdram_init()
130 ram_size = get_ram_size((long int *)CFG_SYS_SDRAM_BASE, 0x80000000); in sdram_init()
131 if (ram_size == 0x08000000) in sdram_init()
/u-boot/common/
A Dmemsize.c97 phys_size_t ram_size = gd->ram_size; in get_effective_memsize() local
107 if (gd->ram_base + ram_size < gd->ram_base) in get_effective_memsize()
108 ram_size = ((phys_size_t)~0xfffULL) - gd->ram_base; in get_effective_memsize()
112 return ram_size; in get_effective_memsize()
115 return ((ram_size > CFG_MAX_MEM_MAPPED) ? in get_effective_memsize()
116 CFG_MAX_MEM_MAPPED : ram_size); in get_effective_memsize()
/u-boot/board/compulab/cl-som-imx7/
A Dspl.c88 static void cl_som_imx7_spl_dram_cfg_size(u32 ram_size) in cl_som_imx7_spl_dram_cfg_size() argument
90 switch (ram_size) { in cl_som_imx7_spl_dram_cfg_size()
145 ulong ram_size_test, ram_size = 0; in cl_som_imx7_spl_dram_cfg() local
147 for (ram_size = SZ_2G; ram_size >= SZ_256M; ram_size >>= 1) { in cl_som_imx7_spl_dram_cfg()
148 cl_som_imx7_spl_dram_cfg_size(ram_size); in cl_som_imx7_spl_dram_cfg()
149 ram_size_test = get_ram_size((long int *)PHYS_SDRAM, ram_size); in cl_som_imx7_spl_dram_cfg()
150 if (ram_size_test == ram_size) in cl_som_imx7_spl_dram_cfg()
154 if (ram_size < SZ_256M) { in cl_som_imx7_spl_dram_cfg()
/u-boot/board/technexion/pico-imx6ul/
A Dspl.c110 static void imx6ul_spl_dram_cfg_size(u32 ram_size) in imx6ul_spl_dram_cfg_size() argument
112 if (ram_size == SZ_256M) in imx6ul_spl_dram_cfg_size()
123 ulong ram_size_test, ram_size = 0; in imx6ul_spl_dram_cfg() local
125 for (ram_size = SZ_512M; ram_size >= SZ_256M; ram_size >>= 1) { in imx6ul_spl_dram_cfg()
126 imx6ul_spl_dram_cfg_size(ram_size); in imx6ul_spl_dram_cfg()
127 ram_size_test = get_ram_size((long int *)PHYS_SDRAM, ram_size); in imx6ul_spl_dram_cfg()
128 if (ram_size_test == ram_size) in imx6ul_spl_dram_cfg()
132 if (ram_size < SZ_256M) { in imx6ul_spl_dram_cfg()
/u-boot/drivers/ddr/altera/
A Dsdram_agilex.c97 (phys_size_t *)&gd->ram_size, &bd); in sdram_mmr_init_full()
103 if (gd->ram_size != hw_size) { in sdram_mmr_init_full()
105 gd->ram_size >> 20); in sdram_mmr_init_full()
110 if (gd->ram_size > hw_size) { in sdram_mmr_init_full()
116 printf("DDR: %lld MiB\n", gd->ram_size >> 20); in sdram_mmr_init_full()
120 FW_MPU_DDR_SCR_WRITEL(gd->ram_size - 1, in sdram_mmr_init_full()
125 FW_MPU_DDR_SCR_WRITEL(gd->ram_size - 1, in sdram_mmr_init_full()
167 priv->info.size = gd->ram_size; in sdram_mmr_init_full()
/u-boot/arch/x86/cpu/coreboot/
A Dsdram.c67 phys_size_t ram_size = 0; in dram_init() local
73 if (memrange->type == CB_MEM_RAM && end > ram_size) in dram_init()
74 ram_size += memrange->size; in dram_init()
77 gd->ram_size = ram_size; in dram_init()
78 if (ram_size == 0) in dram_init()
/u-boot/arch/arm/mach-mvebu/alleycat5/
A Dcpu.c86 gd->ram_size = readl(SCRATCH_PAD_REG) * 4ULL; in alleycat5_dram_init()
89 if (gd->ram_size == 0) { in alleycat5_dram_init()
92 gd->ram_size = SZ_512M; in alleycat5_dram_init()
95 ac5_mem_map[0].size = gd->ram_size; in alleycat5_dram_init()
106 gd->bd->bi_dram[0].size = gd->ram_size; in alleycat5_dram_init_banksize()
/u-boot/arch/x86/cpu/slimbootloader/
A Dsdram.c104 u64 ram_size; in dram_init() local
113 ram_size = 0; in dram_init()
116 ram_size = data->entry[i].addr + data->entry[i].size; in dram_init()
120 if (!ram_size) in dram_init()
123 gd->ram_size = ram_size; in dram_init()
134 gd->bd->bi_dram[0].size = gd->ram_size; in dram_init_banksize()
/u-boot/board/freescale/ls1028a/
A Dddr.c15 gd->ram_size = tfa_get_dram_size(); in fsl_initdram()
17 if (!gd->ram_size) in fsl_initdram()
18 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
/u-boot/board/freescale/ls1046afrwy/
A Dddr.c14 gd->ram_size = tfa_get_dram_size(); in fsl_initdram()
16 if (!gd->ram_size) in fsl_initdram()
17 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
/u-boot/board/freescale/lx2160a/
A Dddr.c15 gd->ram_size = tfa_get_dram_size(); in fsl_initdram()
17 if (!gd->ram_size) in fsl_initdram()
18 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
/u-boot/common/init/
A Dhandoff.c19 ho->ram_size = gd->ram_size; in handoff_save_dram()
29 gd->ram_size = ho->ram_size; in handoff_load_dram_size()
/u-boot/arch/mips/mach-octeon/
A Dcpu.c116 ret = cvmx_bootmem_phy_mem_list_init(gd->ram_size, in octeon_bootmem_init()
160 if (gd->ram_size <= (256 << 20)) { in octeon_configure_load_memory()
162 ((gd->ram_size * 2) / 5) & ~0xFFFFF); in octeon_configure_load_memory()
184 if (gd->ram_size <= (512 << 20)) in octeon_configure_load_memory()
188 if ((gd->ram_size <= (256 << 20)) || in octeon_configure_load_memory()
189 (size > (gd->ram_size - (256 << 20)))) { in octeon_configure_load_memory()
190 mem_top = min_t(u64, gd->ram_size - adjust, in octeon_configure_load_memory()
192 } else if ((gd->ram_size <= (512 << 20)) || in octeon_configure_load_memory()
193 (size > (gd->ram_size - (512 << 20)))) { in octeon_configure_load_memory()
194 mem_top = min_t(u64, gd->ram_size - adjust, in octeon_configure_load_memory()
[all …]
A Ddram.c36 gd->ram_size = ram.size; in dram_init()
43 gd->ram_size = (4 << 20); in dram_init()
44 gd->bd->bi_dram[0].size = gd->ram_size; in dram_init()
84 return CFG_SYS_SDRAM_BASE + min(gd->ram_size, in board_get_usable_ram_top()
/u-boot/board/imgtec/boston/
A Ddt.c17 mem_size[0] = min_t(u64, 256llu << 20, gd->ram_size); in ft_board_setup()
20 if (gd->ram_size > mem_size[0]) { in ft_board_setup()
22 mem_size[1] = gd->ram_size - mem_size[0]; in ft_board_setup()
/u-boot/board/freescale/ls1046aqds/
A Dddr.c100 gd->ram_size = tfa_get_dram_size(); in fsl_initdram()
101 if (!gd->ram_size) in fsl_initdram()
102 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
112 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
127 gd->ram_size = dram_size; in fsl_initdram()
/u-boot/board/freescale/ls1046ardb/
A Dddr.c105 gd->ram_size = tfa_get_dram_size(); in fsl_initdram()
107 if (!gd->ram_size) in fsl_initdram()
108 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
118 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
129 gd->ram_size = dram_size; in fsl_initdram()
/u-boot/board/freescale/ls1088a/
A Dddr.c117 gd->ram_size = tfa_get_dram_size(); in fsl_initdram()
119 if (!gd->ram_size) in fsl_initdram()
120 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
130 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
132 gd->ram_size = fsl_ddr_sdram(); in fsl_initdram()
/u-boot/board/freescale/ls1043aqds/
A Dddr.c116 gd->ram_size = tfa_get_dram_size(); in fsl_initdram()
117 if (!gd->ram_size) in fsl_initdram()
118 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
128 gd->ram_size = fsl_ddr_sdram_size(); in fsl_initdram()
142 gd->ram_size = dram_size; in fsl_initdram()
/u-boot/arch/arm/mach-mvebu/armada8k/
A Ddram.c42 if (gd->ram_size <= max_bank0_size) { in a8k_dram_init_banksize()
43 gd->bd->bi_dram[0].size = gd->ram_size; in a8k_dram_init_banksize()
50 gd->bd->bi_dram[1].size = gd->ram_size - max_bank0_size; in a8k_dram_init_banksize()
/u-boot/arch/arm/mach-mediatek/mt7623/
A Dinit.c33 gd->ram_size = 0; in dram_init()
36 gd->ram_size += preloader_param->dram_rank_size[i]; in dram_init()
38 gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, in dram_init()

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