Home
last modified time | relevance | path

Searched refs:reg0 (Results 1 – 25 of 27) sorted by relevance

12

/u-boot/arch/arm/lib/
A Dsave_prev_bl_data.c18 static ulong reg0 __section(".data");
26 reg0 = r0; in save_boot_params()
54 if (!is_addr_accessible((phys_addr_t)reg0)) in save_prev_bl_data()
57 fdt_blob = (struct fdt_header *)reg0; in save_prev_bl_data()
59 pr_warn("%s: address 0x%lx is not a valid fdt\n", __func__, reg0); in save_prev_bl_data()
64 env_set_addr("prevbl_fdt_addr", (void *)reg0); in save_prev_bl_data()
71 __func__, reg0); in save_prev_bl_data()
/u-boot/post/lib_powerpc/
A Dsrawi.c62 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_srawi() local
70 ASM_STW(reg0, stk, 4), in cpu_post_test_srawi()
72 ASM_LWZ(reg0, stk, 8), in cpu_post_test_srawi()
73 ASM_11S(test->cmd, reg1, reg0, test->op2), in cpu_post_test_srawi()
76 ASM_LWZ(reg0, stk, 4), in cpu_post_test_srawi()
87 ASM_STW(reg0, stk, 4), in cpu_post_test_srawi()
89 ASM_LWZ(reg0, stk, 8), in cpu_post_test_srawi()
90 ASM_11S(test->cmd, reg1, reg0, test->op2) | BIT_C, in cpu_post_test_srawi()
93 ASM_LWZ(reg0, stk, 4), in cpu_post_test_srawi()
A Dtwo.c82 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_two() local
90 ASM_STW(reg0, stk, 4), in cpu_post_test_two()
92 ASM_LWZ(reg0, stk, 8), in cpu_post_test_two()
93 ASM_11(test->cmd, reg1, reg0), in cpu_post_test_two()
96 ASM_LWZ(reg0, stk, 4), in cpu_post_test_two()
107 ASM_STW(reg0, stk, 4), in cpu_post_test_two()
109 ASM_LWZ(reg0, stk, 8), in cpu_post_test_two()
110 ASM_11(test->cmd, reg1, reg0) | BIT_C, in cpu_post_test_two()
113 ASM_LWZ(reg0, stk, 4), in cpu_post_test_two()
A Dtwox.c82 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_twox() local
90 ASM_STW(reg0, stk, 4), in cpu_post_test_twox()
92 ASM_LWZ(reg0, stk, 8), in cpu_post_test_twox()
93 ASM_11X(test->cmd, reg1, reg0), in cpu_post_test_twox()
96 ASM_LWZ(reg0, stk, 4), in cpu_post_test_twox()
107 ASM_STW(reg0, stk, 4), in cpu_post_test_twox()
109 ASM_LWZ(reg0, stk, 8), in cpu_post_test_twox()
110 ASM_11X(test->cmd, reg1, reg0) | BIT_C, in cpu_post_test_twox()
113 ASM_LWZ(reg0, stk, 4), in cpu_post_test_twox()
A Drlwinm.c60 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_rlwinm() local
68 ASM_STW(reg0, stk, 4), in cpu_post_test_rlwinm()
70 ASM_LWZ(reg0, stk, 8), in cpu_post_test_rlwinm()
71 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwinm()
74 ASM_LWZ(reg0, stk, 4), in cpu_post_test_rlwinm()
85 ASM_STW(reg0, stk, 4), in cpu_post_test_rlwinm()
87 ASM_LWZ(reg0, stk, 8), in cpu_post_test_rlwinm()
88 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, in cpu_post_test_rlwinm()
92 ASM_LWZ(reg0, stk, 4), in cpu_post_test_rlwinm()
A Drlwnm.c61 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_rlwnm() local
71 ASM_STW(reg0, stk, 8), in cpu_post_test_rlwnm()
75 ASM_LWZ(reg0, stk, 16), in cpu_post_test_rlwnm()
76 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me), in cpu_post_test_rlwnm()
80 ASM_LWZ(reg0, stk, 8), in cpu_post_test_rlwnm()
92 ASM_STW(reg0, stk, 8), in cpu_post_test_rlwnm()
96 ASM_LWZ(reg0, stk, 16), in cpu_post_test_rlwnm()
97 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me) | in cpu_post_test_rlwnm()
102 ASM_LWZ(reg0, stk, 8), in cpu_post_test_rlwnm()
A Drlwimi.c63 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_rlwimi() local
72 ASM_STW(reg0, stk, 4), in cpu_post_test_rlwimi()
75 ASM_LWZ(reg0, stk, 12), in cpu_post_test_rlwimi()
76 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwimi()
79 ASM_LWZ(reg0, stk, 4), in cpu_post_test_rlwimi()
91 ASM_STW(reg0, stk, 4), in cpu_post_test_rlwimi()
94 ASM_LWZ(reg0, stk, 12), in cpu_post_test_rlwimi()
95 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me) | in cpu_post_test_rlwimi()
99 ASM_LWZ(reg0, stk, 4), in cpu_post_test_rlwimi()
A Dthreex.c126 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_threex() local
136 ASM_STW(reg0, stk, 8), in cpu_post_test_threex()
140 ASM_LWZ(reg0, stk, 16), in cpu_post_test_threex()
141 ASM_12X(test->cmd, reg2, reg1, reg0), in cpu_post_test_threex()
145 ASM_LWZ(reg0, stk, 8), in cpu_post_test_threex()
157 ASM_STW(reg0, stk, 8), in cpu_post_test_threex()
161 ASM_LWZ(reg0, stk, 16), in cpu_post_test_threex()
162 ASM_12X(test->cmd, reg2, reg1, reg0) | BIT_C, in cpu_post_test_threex()
166 ASM_LWZ(reg0, stk, 8), in cpu_post_test_threex()
A Dthree.c156 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_three() local
166 ASM_STW(reg0, stk, 8), in cpu_post_test_three()
170 ASM_LWZ(reg0, stk, 16), in cpu_post_test_three()
171 ASM_12(test->cmd, reg2, reg1, reg0), in cpu_post_test_three()
175 ASM_LWZ(reg0, stk, 8), in cpu_post_test_three()
187 ASM_STW(reg0, stk, 8), in cpu_post_test_three()
191 ASM_LWZ(reg0, stk, 16), in cpu_post_test_three()
192 ASM_12(test->cmd, reg2, reg1, reg0) | BIT_C, in cpu_post_test_three()
196 ASM_LWZ(reg0, stk, 8), in cpu_post_test_three()
A Dthreei.c76 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_threei() local
84 ASM_STW(reg0, stk, 4), in cpu_post_test_threei()
86 ASM_LWZ(reg0, stk, 8), in cpu_post_test_threei()
87 ASM_11IX(test->cmd, reg1, reg0, test->op2), in cpu_post_test_threei()
90 ASM_LWZ(reg0, stk, 4), in cpu_post_test_threei()
A Dandi.c62 unsigned int reg0 = (reg + 0) % 32; in cpu_post_test_andi() local
70 ASM_STW(reg0, stk, 4), in cpu_post_test_andi()
72 ASM_LWZ(reg0, stk, 8), in cpu_post_test_andi()
73 ASM_11IX(test->cmd, reg1, reg0, test->op2), in cpu_post_test_andi()
76 ASM_LWZ(reg0, stk, 4), in cpu_post_test_andi()
/u-boot/board/mscc/jr2/
A Djr2.c40 void __iomem *reg0, *reg1; in vcoreiii_gpio_set_alternate() local
44 reg0 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT(0); in vcoreiii_gpio_set_alternate()
49 reg0 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT1(0); in vcoreiii_gpio_set_alternate()
52 val0 = readl(reg0); in vcoreiii_gpio_set_alternate()
55 writel(val0 | mask, reg0); in vcoreiii_gpio_set_alternate()
58 writel(val0 & ~mask, reg0); in vcoreiii_gpio_set_alternate()
61 writel(val0 | mask, reg0); in vcoreiii_gpio_set_alternate()
64 writel(val0 & ~mask, reg0); in vcoreiii_gpio_set_alternate()
/u-boot/scripts/coccinelle/net/
A Dmdio_register.cocci28 identifier name0, addr0, reg0, output;
35 - addrT reg0,
42 + int reg0
111 identifier name0, addr0, reg0, value0;
119 - addrT reg0,
126 + int reg0,
/u-boot/drivers/ram/renesas/rzn1/
A Dddr_async.c38 u32 *reg0; member
221 priv->reg0, priv->reg350, in rzn1_dram_init()
319 priv->reg0 = malloc(88 * sizeof(u32)); in cadence_ddr_probe()
321 if (!priv->reg0 || !priv->reg350) in cadence_ddr_probe()
332 ret = ofnode_read_u32_array(subnode, "cadence,ctl-000", priv->reg0, 88); in cadence_ddr_probe()
358 free(priv->reg0); in cadence_ddr_probe()
/u-boot/arch/arm/mach-keystone/
A Dclock.c72 clrsetbits_le32(keystone_pll_regs[data->pll].reg0, in configure_mult_div()
78 clrsetbits_le32(keystone_pll_regs[data->pll].reg0, in configure_mult_div()
87 clrsetbits_le32(keystone_pll_regs[data->pll].reg0, in configure_mult_div()
172 setbits_le32(keystone_pll_regs[data->pll].reg0, in configure_secondary_pll()
178 clrsetbits_le32(keystone_pll_regs[data->pll].reg0, in configure_secondary_pll()
197 clrbits_le32(keystone_pll_regs[data->pll].reg0, in configure_secondary_pll()
/u-boot/drivers/pinctrl/rockchip/
A Dpinctrl-rk3588.c41 u32 reg0 = 0; in rk3588_set_mux() local
43 reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rk3588_set_mux()
46 ret = regmap_write(regmap, reg0, data); in rk3588_set_mux()
48 reg0 = reg + 0x8000; /* BUS_IOC_BASE */ in rk3588_set_mux()
52 regmap_write(regmap, reg0, data); in rk3588_set_mux()
/u-boot/board/gdsys/common/
A Dosd.c207 u8 reg0, reg4, reg8, reg12, reg18, reg20; in ics8n3qv01_set() local
217 reg0 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 0) & 0xc0; in ics8n3qv01_set()
218 reg0 |= (mint & 0x1f) << 1; in ics8n3qv01_set()
219 reg0 |= (mfrac >> 17) & 0x01; in ics8n3qv01_set()
220 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 0, reg0); in ics8n3qv01_set()
/u-boot/drivers/ram/cadence/
A Dddr_ctrl.c304 const u32 *reg0, const u32 *reg350, in cdns_ddr_ctrl_init() argument
312 ddrc_writel(*reg0, ddr_ctrl_base + 0); in cdns_ddr_ctrl_init()
315 ddrc_writel(*(reg0 + i), ddr_ctrl_base + i); in cdns_ddr_ctrl_init()
318 ddrc_writel(*(reg0 + i), ddr_ctrl_base + i); in cdns_ddr_ctrl_init()
/u-boot/arch/arm/mach-keystone/include/mach/
A Dclock.h107 u32 reg0; member
/u-boot/include/renesas/
A Dddr_ctrl.h43 const u32 *reg0, const u32 *reg350,
/u-boot/arch/arm/include/asm/mach-imx/
A Dsys_proto.h262 unsigned long call_imx_sip(unsigned long id, unsigned long reg0,
265 unsigned long call_imx_sip_ret2(unsigned long id, unsigned long reg0,
/u-boot/arch/arm/dts/
A Dac5-98dx35xx-rd.dts34 sar-reg0 = "/config-space/sar-reg";
/u-boot/arch/mips/mach-octeon/
A Dcvmx-pko3-compat.c556 if (pko_command.s.reg0) { in cvmx_pko3_legacy_xmit()
560 pko_command.s.reg0, pko_command.s.size0); in cvmx_pko3_legacy_xmit()
564 CASTPTR(void, __cvmx_fau_sw_addr(pko_command.s.reg0))); in cvmx_pko3_legacy_xmit()
/u-boot/drivers/tee/optee/
A Dcore.c216 static void *reg_pair_to_ptr(u32 reg0, u32 reg1) in reg_pair_to_ptr() argument
218 return (void *)(ulong)(((u64)reg0 << 32) | reg1); in reg_pair_to_ptr()
227 static void reg_pair_from_64(u32 *reg0, u32 *reg1, u64 val) in reg_pair_from_64() argument
229 *reg0 = val >> 32; in reg_pair_from_64()
/u-boot/drivers/pci/
A Dpcie_intel_fpga.c139 static void tlp_write_tx(struct intel_fpga_pcie *pcie, u32 reg0, u32 ctrl) in tlp_write_tx() argument
141 cra_writel(pcie, reg0, RP_TX_REG0); in tlp_write_tx()

Completed in 49 milliseconds

12