Home
last modified time | relevance | path

Searched refs:rk_clrsetreg (Results 1 – 25 of 49) sorted by relevance

12

/u-boot/arch/arm/mach-rockchip/px30/
A Dpx30.c260 rk_clrsetreg(&grf->gpio1dl_iomux, in arch_cpu_init()
264 rk_clrsetreg(&grf->gpio1dh_iomux, in arch_cpu_init()
273 rk_clrsetreg(&grf->gpio1al_iomux, in arch_cpu_init()
337 rk_clrsetreg(&grf->gpio1cl_iomux, in board_debug_uart_init()
359 rk_clrsetreg(&grf->iofunc_con0, in board_debug_uart_init()
363 rk_clrsetreg(&grf->gpio1bh_iomux, in board_debug_uart_init()
368 rk_clrsetreg(&grf->iofunc_con0, in board_debug_uart_init()
387 rk_clrsetreg(&grf->gpio3al_iomux, in board_debug_uart_init()
424 rk_clrsetreg(&grf->iofunc_con0, in board_debug_uart_init()
428 rk_clrsetreg(&grf->gpio2bh_iomux, in board_debug_uart_init()
[all …]
/u-boot/arch/arm/mach-rockchip/rk3368/
A Drk3368.c71 rk_clrsetreg(&grf->soc_con14, MCU_SRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
73 rk_clrsetreg(&grf->soc_con11, MCU_SRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
75 rk_clrsetreg(&grf->soc_con14, MCU_EXSRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
77 rk_clrsetreg(&grf->soc_con12, MCU_EXSRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
79 rk_clrsetreg(&grf->soc_con14, MCU_EXPERI_BASE_BIT31_BIT28_MASK, in mcu_init()
81 rk_clrsetreg(&grf->soc_con13, MCU_EXPERI_BASE_BIT27_BIT12_MASK, in mcu_init()
195 rk_clrsetreg(&grf->gpio2d_iomux, in board_debug_uart_init()
197 rk_clrsetreg(&grf->gpio2d_iomux, in board_debug_uart_init()
215 rk_clrsetreg(&pmugrf->gpio0d_iomux, in board_debug_uart_init()
235 rk_clrsetreg(&grf->gpio2a_iomux, in board_debug_uart_init()
[all …]
/u-boot/arch/arm/mach-rockchip/rk3188/
A Drk3188.c47 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
66 rk_clrsetreg(&grf->uoc0_con[0], in arch_cpu_init()
70 rk_clrsetreg(&grf->uoc0_con[2], in arch_cpu_init()
72 rk_clrsetreg(&grf->uoc0_con[3], in arch_cpu_init()
79 rk_clrsetreg(&grf->uoc0_con[0], in arch_cpu_init()
103 rk_clrsetreg(&grf->soc_con0, in rk_board_late_init()
/u-boot/drivers/clk/rockchip/
A Dclk_pll.c271 rk_clrsetreg(base + pll->mode_offset, in rk3036_pll_set_rate()
279 rk_clrsetreg(base + pll->con_offset, in rk3036_pll_set_rate()
284 rk_clrsetreg(base + pll->con_offset + 0x4, in rk3036_pll_set_rate()
290 rk_clrsetreg(base + pll->con_offset + 0x4, in rk3036_pll_set_rate()
408 rk_clrsetreg(base + pll->mode_offset, in rk3588_pll_set_rate()
420 rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(5), in rk3588_pll_set_rate()
428 rk_clrsetreg(base + pll->con_offset, in rk3588_pll_set_rate()
475 rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(5), in rk3588_pll_set_rate()
478 rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(6), in rk3588_pll_set_rate()
481 rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(6), in rk3588_pll_set_rate()
[all …]
A Dclk_rk322x.c68 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
92 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
112 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
117 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
135 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
140 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
160 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
169 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
304 rk_clrsetreg(&cru->cru_clksel_con[11], in rockchip_mmc_set_clk()
307 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
[all …]
A Dclk_rv1108.c213 rk_clrsetreg(&cru->clksel_con[22], in rv1108_saradc_set_clk()
238 rk_clrsetreg(&cru->clksel_con[28], in rv1108_aclk_vio1_set_clk()
264 rk_clrsetreg(&cru->clksel_con[28], in rv1108_aclk_vio0_set_clk()
270 rk_clrsetreg(&cru->clksel_con[29], in rv1108_aclk_vio0_set_clk()
274 rk_clrsetreg(&cru->clksel_con[29], in rv1108_aclk_vio0_set_clk()
299 rk_clrsetreg(&cru->clksel_con[32], in rv1108_dclk_vop_set_clk()
329 rk_clrsetreg(&cru->clksel_con[2], in rv1108_aclk_bus_set_clk()
381 rk_clrsetreg(&cru->clksel_con[23], in rv1108_aclk_peri_set_clk()
397 rk_clrsetreg(&cru->clksel_con[23], in rv1108_hclk_peri_set_clk()
412 rk_clrsetreg(&cru->clksel_con[23], in rv1108_pclk_peri_set_clk()
[all …]
A Dclk_rk3288.c435 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
464 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
487 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
496 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
520 rk_clrsetreg(&cru->cru_clksel_con[0], in rk3288_clk_configure_cpu()
531 rk_clrsetreg(&cru->cru_clksel_con[37], in rk3288_clk_configure_cpu()
635 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
642 rk_clrsetreg(&cru->cru_clksel_con[11], in rockchip_mmc_set_clk()
649 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
701 rk_clrsetreg(&cru->cru_clksel_con[25], in rockchip_spi_set_clk()
[all …]
A Dclk_rk3188.c108 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
213 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_configure_cpu()
218 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_configure_cpu()
305 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
311 rk_clrsetreg(&cru->cru_clksel_con[11], in rockchip_mmc_set_clk()
317 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
383 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
407 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
420 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
443 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
[all …]
A Dclk_rk3588.c204 rk_clrsetreg(&cru->clksel_con[165], in rk3588_center_set_clk()
217 rk_clrsetreg(&cru->clksel_con[165], in rk3588_center_set_clk()
230 rk_clrsetreg(&cru->clksel_con[165], in rk3588_center_set_clk()
243 rk_clrsetreg(&cru->clksel_con[165], in rk3588_center_set_clk()
310 rk_clrsetreg(&cru->clksel_con[8], in rk3588_top_set_clk()
320 rk_clrsetreg(&cru->clksel_con[8], in rk3588_top_set_clk()
334 rk_clrsetreg(&cru->clksel_con[8], in rk3588_top_set_clk()
509 rk_clrsetreg(&cru->clksel_con[59], in rk3588_spi_set_clk()
514 rk_clrsetreg(&cru->clksel_con[59], in rk3588_spi_set_clk()
519 rk_clrsetreg(&cru->clksel_con[59], in rk3588_spi_set_clk()
[all …]
A Dclk_rk3066.c103 rk_clrsetreg(&pll->con0, in rk3066_clk_set_pll()
205 rk_clrsetreg(&cru->cru_clksel_con[0], in rk3066_clk_configure_cpu()
210 rk_clrsetreg(&cru->cru_clksel_con[1], in rk3066_clk_configure_cpu()
296 rk_clrsetreg(&cru->cru_clksel_con[12], in rk3066_clk_mmc_set_clk()
302 rk_clrsetreg(&cru->cru_clksel_con[11], in rk3066_clk_mmc_set_clk()
308 rk_clrsetreg(&cru->cru_clksel_con[12], in rk3066_clk_mmc_set_clk()
417 rk_clrsetreg(&cru->cru_mode_con, in rk3066_clk_init()
441 rk_clrsetreg(&cru->cru_clksel_con[0], in rk3066_clk_init()
454 rk_clrsetreg(&cru->cru_clksel_con[1], in rk3066_clk_init()
477 rk_clrsetreg(&cru->cru_clksel_con[10], in rk3066_clk_init()
[all …]
A Dclk_rv1126.c550 rk_clrsetreg(&cru->clksel_con[1], in rv1126_armclk_set_clk()
555 rk_clrsetreg(&cru->clksel_con[1], in rv1126_armclk_set_clk()
655 rk_clrsetreg(&cru->clksel_con[2], in rv1126_pdbus_set_clk()
663 rk_clrsetreg(&cru->clksel_con[2], in rv1126_pdbus_set_clk()
672 rk_clrsetreg(&cru->clksel_con[3], in rv1126_pdbus_set_clk()
844 rk_clrsetreg(&cru->clksel_con[8], in rv1126_spi_set_clk()
968 rk_clrsetreg(&cru->clksel_con[7], in rv1126_crypto_set_clk()
976 rk_clrsetreg(&cru->clksel_con[7], in rv1126_crypto_set_clk()
984 rk_clrsetreg(&cru->clksel_con[4], in rv1126_crypto_set_clk()
1101 rk_clrsetreg(&cru->clksel_con[58], in rv1126_sfc_set_clk()
[all …]
A Dclk_rk3568.c542 rk_clrsetreg(&cru->clksel_con[0], in rk3568_armclk_set_clk()
545 rk_clrsetreg(&cru->clksel_con[2], in rk3568_armclk_set_clk()
564 rk_clrsetreg(&cru->clksel_con[3], in rk3568_armclk_set_clk()
568 rk_clrsetreg(&cru->clksel_con[4], in rk3568_armclk_set_clk()
573 rk_clrsetreg(&cru->clksel_con[5], in rk3568_armclk_set_clk()
577 rk_clrsetreg(&cru->clksel_con[3], in rk3568_armclk_set_clk()
581 rk_clrsetreg(&cru->clksel_con[4], in rk3568_armclk_set_clk()
586 rk_clrsetreg(&cru->clksel_con[5], in rk3568_armclk_set_clk()
705 rk_clrsetreg(&cru->clksel_con[con], in rk3568_cpll_div_set_rate()
1550 rk_clrsetreg(&cru->clksel_con[28], in rk3568_sfc_set_clk()
[all …]
A Dclk_rk3328.c267 rk_clrsetreg(&pll_con[0], in rkclk_set_pll()
271 rk_clrsetreg(&pll_con[1], in rkclk_set_pll()
301 rk_clrsetreg(&cru->clksel_con[28], in rkclk_init()
305 rk_clrsetreg(&cru->clksel_con[29], in rkclk_init()
324 rk_clrsetreg(&cru->clksel_con[0], in rk3328_configure_cpu()
329 rk_clrsetreg(&cru->clksel_con[1], in rk3328_configure_cpu()
374 rk_clrsetreg(&cru->clksel_con[34], in rk3328_i2c_set_clk()
381 rk_clrsetreg(&cru->clksel_con[34], in rk3328_i2c_set_clk()
526 rk_clrsetreg(&cru->clksel_con[24], in rk3328_pwm_set_clk()
552 rk_clrsetreg(&cru->clksel_con[23], in rk3328_saradc_set_clk()
[all …]
A Dclk_px30.c241 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
329 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
336 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
343 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
350 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
502 rk_clrsetreg(&cru->clksel_con[15], in px30_nandc_set_clk()
602 rk_clrsetreg(&cru->clksel_con[22], in px30_sfc_set_clk()
682 rk_clrsetreg(&cru->clksel_con[55], in px30_saradc_set_clk()
708 rk_clrsetreg(&cru->clksel_con[54], in px30_tsadc_set_clk()
808 rk_clrsetreg(&cru->clksel_con[3], in px30_vop_set_clk()
[all …]
A Dclk_rk3128.c63 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
151 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
171 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
176 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
194 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
199 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
219 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
228 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
235 rk_clrsetreg(&cru->cru_clksel_con[2], in rkclk_init()
331 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
[all …]
A Dclk_rk3036.c69 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
72 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
90 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
110 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
115 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
133 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
138 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
158 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
167 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
265 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
[all …]
A Dclk_rk3399.c352 rk_clrsetreg(&pll_con[1], in rkclk_set_pll()
454 rk_clrsetreg(&cru->clksel_con[0], in rk3399_configure_cpu_l()
461 rk_clrsetreg(&cru->clksel_con[1], in rk3399_configure_cpu_l()
489 rk_clrsetreg(&cru->clksel_con[2], in rk3399_configure_cpu_b()
496 rk_clrsetreg(&cru->clksel_con[3], in rk3399_configure_cpu_b()
705 rk_clrsetreg(aclkreg_addr, in rk3399_vop_set_clk()
716 rk_clrsetreg(dclkreg_addr, in rk3399_vop_set_clk()
922 rk_clrsetreg(&cru->clksel_con[26], in rk3399_saradc_set_clk()
1352 rk_clrsetreg(&cru->clksel_con[14], in rkclk_init()
1372 rk_clrsetreg(&cru->clksel_con[23], in rkclk_init()
[all …]
A Dclk_rk3308.c92 rk_clrsetreg(&cru->clksel_con[0], in rk3308_armclk_set_clk()
100 rk_clrsetreg(&cru->clksel_con[0], in rk3308_armclk_set_clk()
331 rk_clrsetreg(&cru->clksel_con[34], in rk3308_saradc_set_clk()
359 rk_clrsetreg(&cru->clksel_con[33], in rk3308_tsadc_set_clk()
446 rk_clrsetreg(&cru->clksel_con[29], in rk3308_pwm_set_clk()
527 rk_clrsetreg(&cru->clksel_con[8], in rk3308_vop_set_clk()
531 rk_clrsetreg(&cru->clksel_con[8], in rk3308_vop_set_clk()
586 rk_clrsetreg(&cru->clksel_con[5], in rk3308_bus_set_clk()
592 rk_clrsetreg(&cru->clksel_con[6], in rk3308_bus_set_clk()
597 rk_clrsetreg(&cru->clksel_con[6], in rk3308_bus_set_clk()
[all …]
/u-boot/arch/arm/mach-rockchip/rk3399/
A Drk3399.c104 rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0); in arch_cpu_init()
125 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
128 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
133 rk_clrsetreg(&grf->gpio3b_iomux, in board_debug_uart_init()
136 rk_clrsetreg(&grf->gpio3b_iomux, in board_debug_uart_init()
162 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
165 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
169 rk_clrsetreg(&grf->soc_con7, in board_debug_uart_init()
/u-boot/drivers/net/
A Dgmac_rockchip.c341 rk_clrsetreg(&grf->gmac_con0, in rv1108_set_rmii_speed()
359 rk_clrsetreg(&grf->mac_con1, in px30_gmac_set_to_rmii()
392 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_set_to_rgmii()
412 rk_clrsetreg(&grf->soc_con1, in rk3288_gmac_set_to_rgmii()
416 rk_clrsetreg(&grf->soc_con3, in rk3288_gmac_set_to_rgmii()
437 rk_clrsetreg(&grf->mac_con0, in rk3308_gmac_set_to_rmii()
508 rk_clrsetreg(&grf->soc_con15, in rk3368_gmac_set_to_rgmii()
512 rk_clrsetreg(&grf->soc_con16, in rk3368_gmac_set_to_rgmii()
528 rk_clrsetreg(&grf->soc_con5, in rk3399_gmac_set_to_rgmii()
532 rk_clrsetreg(&grf->soc_con6, in rk3399_gmac_set_to_rgmii()
[all …]
/u-boot/arch/arm/mach-rockchip/rk322x/
A Drk322x.c42 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
47 rk_clrsetreg(&grf->con_iomux, in board_debug_uart_init()
68 rk_clrsetreg(&grf->macphy_con[0], in arch_cpu_init()
/u-boot/arch/arm/mach-rockchip/rk3308/
A Drk3308.c171 rk_clrsetreg(&grf->soc_con0, IOVSEL3_CTRL_MASK | IOVSEL3_MASK, val); in rk_board_init()
183 rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK, in board_debug_uart_init()
185 rk_clrsetreg(&grf->gpio4d_iomux, in board_debug_uart_init()
205 rk_clrsetreg(&grf->soc_con13, in arch_cpu_init()
213 rk_clrsetreg(&grf->soc_con15, in arch_cpu_init()
/u-boot/drivers/video/rockchip/
A Drk3288_mipi.c39 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
44 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
65 rk_clrsetreg(&grf->soc_con8, RK3288_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
70 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
76 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
A Drk3399_mipi.c37 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
41 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
61 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
65 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); in rk_mipi_dphy_mode_set()
69 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); in rk_mipi_dphy_mode_set()
/u-boot/arch/arm/mach-rockchip/rk3328/
A Drk3328.c90 rk_clrsetreg(&grf->com_iomux, in board_debug_uart_init()
93 rk_clrsetreg(&grf->gpio2a_iomux, in board_debug_uart_init()
96 rk_clrsetreg(&grf->gpio2a_iomux, in board_debug_uart_init()

Completed in 73 milliseconds

12